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公开(公告)号:DE60133057T2
公开(公告)日:2009-02-26
申请号:DE60133057
申请日:2001-01-03
Applicant: SONY CORP
Inventor: WADA HIROYUKI , HIRATA YOSHIMI , TAGUCHI AYUMU , TATSUKI KOICHI , UMEZU NOBUHIKO , KUBOTA SHIGEO , ABE TETSUO , OOSHIMA AKIFUMI , HATTORI TADASHI , TAKATOKU MAKOTO , SUGANO YUKIYASU
IPC: H01L21/263 , H01L21/66
Abstract: The state of a polysilicon film formed by excimer laser annealing an amorphous silicon film is to be evaluated. When the amorphous silicon film is annealed to form a polysilicon film, linearity or periodicity presents itself in the spatial structure of the film surface of the polysilicon film formed depending on the energy applied to the amorphous silicon during annealing. This linearity or periodicity is processed as an image and represented numerically from the image by exploiting the linearity or periodicity. The state of the polysilicon film is checked based on the numerical results.
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公开(公告)号:DE60133057D1
公开(公告)日:2008-04-17
申请号:DE60133057
申请日:2001-01-03
Applicant: SONY CORP
Inventor: WADA HIROYUKI , HIRATA YOSHIMI , TAGUCHI AYUMU , TATSUKI KOICHI , UMEZU NOBUHIKO , KUBOTA SHIGEO , ABE TETSUO , OOSHIMA AKIFUMI , HATTORI TADASHI , TAKATOKU MAKOTO , SUGANO YUKIYASU
IPC: H01L21/263 , H01L21/66
Abstract: The state of a polysilicon film formed by excimer laser annealing an amorphous silicon film is to be evaluated. When the amorphous silicon film is annealed to form a polysilicon film, linearity or periodicity presents itself in the spatial structure of the film surface of the polysilicon film formed depending on the energy applied to the amorphous silicon during annealing. This linearity or periodicity is processed as an image and represented numerically from the image by exploiting the linearity or periodicity. The state of the polysilicon film is checked based on the numerical results.
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公开(公告)号:JP2003217499A
公开(公告)日:2003-07-31
申请号:JP2002008568
申请日:2002-01-17
Applicant: SONY CORP
Inventor: FUJITA HIRONORI , HATTORI TADASHI , OKAWACHI HIROKI , ABE TETSUO , AKI YUICHI , TAKEDA MINORU
IPC: H01L21/66 , H01J37/28 , H01J37/301
Abstract: PROBLEM TO BE SOLVED: To miniaturize an inspection/measurement device and to reduce and inspection/measurement time, in an inspection/measurement process using an electron beam. SOLUTION: This inspection/measurement device 1 has a plurality of SEM inspection units 2 (inspection/measurement units) each provided with an electron gun unit 7 for irradiating an electron beam 5 on a chip 4 (sample) and for detecting secondary electrons 6 from the chip (sample), and a local vacuum means 10 installed on the side of an electron beam irradiation opening 8 of the electron gun unit. This inspection/measurement device is disposed so as to face a semiconductor wafer 3 (sample aggregation) having a plurality of chips (samples) and so as to make the respective SEM inspection units (inspection/measurement units) correspond to the respective chips (samples). COPYRIGHT: (C)2003,JPO
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公开(公告)号:JP2003151886A
公开(公告)日:2003-05-23
申请号:JP2001349991
申请日:2001-11-15
Applicant: SONY CORP
Inventor: OKAWACHI HIROKI , HATTORI TADASHI , FUJITA HIRONORI , ABE TETSUO , AKI YUICHI , TAKEDA MINORU
IPC: H01L21/66 , H01J37/20 , H01J37/28 , H01L21/027
Abstract: PROBLEM TO BE SOLVED: To miniaturize an inspection apparatus and to a shorten inspection/ measurement time in an inspection/measurement process of a semiconductor wafer. SOLUTION: The inspection apparatus has an SEM inspection unit 6, an optical inspection unit 5, and an appearance inspection unit 7. A local vacuum means 8 is provided in the SEM inspection unit, and at the same time, one X-Y stage (wafer conveyance means) 3 that is arranged opposite to each inspection unit is provided, and a semiconductor wafer 2 is conveyed among the inspection units by the X-Y stage (wafer conveyance means).
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公开(公告)号:JP2001196592A
公开(公告)日:2001-07-19
申请号:JP2000005995
申请日:2000-01-07
Applicant: SONY CORP
Inventor: WADA HIROYUKI , HIRATA YOSHIMI , TAGUCHI AYUMI , TATSUKI KOICHI , UMETSU NOBUHIKO , KUBOTA SHIGEO , ABE TETSUO , OOSHIMA AKIFUMI , HATTORI TADASHI , TAKATOKU MASATO , SUGANO YUKIYASU
IPC: H01L21/20 , G02F1/136 , G02F1/1365 , G02F1/1368 , H01L21/268 , H01L21/336 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To evaluate the state of a polysilicon film which is formed by excimer laser annealing an amorphous silicon film. SOLUTION: The state of a formed polysilicon film is evaluated to acquire the manufacture margin of the film, and based on the margin, a power is set with an excimer laser annealing device. At the formation of the playsilicon film by annealing an amorphous silicon film, linearity and periodicity appear in the spatial structure in the film surface of formed polysilicon film, according to the energy given to the amorphous silicon at annealing. After the linearity and periodicity are image-processed, the linearity and periodicity of the image are made into numerical values utilizing an auto-correlation function. Then, the auto-correlation value of the surface image of polysilicon film in an S/D region as well as that on a gate electrode are acquired for calculating the laser power which satisfies both, and this is set as the manufacture margin.
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公开(公告)号:JPH08316297A
公开(公告)日:1996-11-29
申请号:JP12414395
申请日:1995-05-24
Applicant: SONY CORP
Inventor: SHIROSAKI TOMOHIDE , HATTORI TADASHI , HIRANO SHINSUKE
IPC: B23Q3/15 , H01L21/203 , H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/68 , H01L21/683 , H01L23/58
Abstract: PURPOSE: To suppress a generation of a surge current at the time of chucking operations. CONSTITUTION: In an electrostatic chuck comprising a dielectric 7 on a surface of a chuck electrode 6 and a power source 10 for a high voltage for applying a voltage to the chuck electrode 6, in order to attract and hold a wafer 11 placed on the dielectric 7 by an electrostatic force. A voltage control part 12 as voltage variable means for gradually changing an output voltage of the power source 10 for a high voltage is connected to the power source 10 for a high voltage. According to an instruction from the voltage control part 12, when the wafer 11 is attracted on the dielectric 7, an output voltage of the power source 10 for a high voltage is gradually increased, and further when the wafer 11 is detached from the dielectric 7, an output voltage of the power source 10 for a high voltage is gradually decreased.
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公开(公告)号:JP2004221386A
公开(公告)日:2004-08-05
申请号:JP2003008025
申请日:2003-01-16
Inventor: OKAWACHI HIROKI , HATTORI TADASHI , TAKAYAMA MASATO , FUJITA HIRONORI , AKI YUICHI , TAKEDA MINORU
IPC: H01L21/66 , H01J37/16 , H01J37/18 , H01J37/28 , H01L21/027 , H01L21/50 , H01L21/68 , H01L21/683 , H01L23/52
Abstract: PROBLEM TO BE SOLVED: To provide an inspection and measurement device of a particulate semiconductor and an inspection and measurement method of the particulate semiconductor in which a spherical semiconductor can be held in non-contact separating the vacuum space of a specific gap without using a large-scaled clean room. SOLUTION: The inspection and measurement device 100 of the particulate semiconductor comprises a local vacuum mechanism 5 for holding a particular semiconductor 3 in non-contact separating the vacuum space of the specific gap. The local vacuum mechanism 5 is constituted of a curved surface 15 recessed in the surface of a block body 22 to oppose an external plane of the particular semiconductor 3, an electron beam path perforated in the block body 22 to open to the curved surface 15, an exhaust port 19 provided in the curved surface 15 in its circumferential direction about the electron beam path, and an admission port 21 provided outside the exhaust port 19 in its circumferential direction about the electron beam path. COPYRIGHT: (C)2004,JPO&NCIPI
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公开(公告)号:JP2001196593A
公开(公告)日:2001-07-19
申请号:JP2000005996
申请日:2000-01-07
Applicant: SONY CORP
Inventor: WADA HIROYUKI , HIRATA YOSHIMI , TAGUCHI AYUMI , TATSUKI KOICHI , UMETSU NOBUHIKO , KUBOTA SHIGEO , ABE TETSUO , OOSHIMA AKIFUMI , HATTORI TADASHI , TAKATOKU MASATO , SUGANO YUKIYASU
IPC: H01L21/20 , H01L21/336 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To evaluate the state of a polysilicon film which is formed by excimer laser annealing an amorphous silicon film. SOLUTION: Related to the manufacturing process for an bottom-gate TFT, a polysilicon film is formed, and then its quality is decided. At formation of the polysilicon film by annealing an amorphous silicon film, linearity and periodicity appear in the spatial structure in the film surface of formed polysilicon film, according to the energy giving to the amorphous silicon at annealing. After the linearity and periodicity are image-processed, the linearity and periodicity of the image are made into numerical values utilizing an auto-correlating function. Then, the auto-correlating value of the surface image of polysilicon film in an S/D region as well as that on a gate electrode are acquired, and both numerical results is utilized to decide the quality of the polysilicon film.
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公开(公告)号:JP2001196430A
公开(公告)日:2001-07-19
申请号:JP2000005994
申请日:2000-01-07
Applicant: SONY CORP
Inventor: WADA HIROYUKI , HIRATA YOSHIMI , TAGUCHI AYUMI , TATSUKI KOICHI , UMETSU NOBUHIKO , KUBOTA SHIGEO , ABE TETSUO , OOSHIMA AKIFUMI , HATTORI TADASHI , TAKATOKU MASATO , SUGANO YUKIYASU
IPC: G01N21/956 , G02F1/136 , G02F1/1368 , H01L21/20 , H01L21/336 , H01L21/66 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To evaluate the state of a polysilicon film formed by annealing an amorphous silicon film with an excimer laser. SOLUTION: Linearity or periodicity appears in the spatial structure of the film surface of a polysilicon film corresponding to energy given to an amorphous silicon film when the amorphous silicon film is subjected to an annealing treatment for the formation of the polysilicon film. The linearity or periodicity is subjected to image processing, and then the linearity or periodicity is digitized using the auto-correlation function. The state of a polysilicon film is decided based on a digitized result.
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公开(公告)号:JPH05235146A
公开(公告)日:1993-09-10
申请号:JP7226892
申请日:1992-02-20
Applicant: SONY CORP
Inventor: AIBA TAKESHI , HATTORI TADASHI
IPC: B65G49/07 , H01L21/677 , H01L21/68
Abstract: PURPOSE:To provide a method for conveying a wafer which can accurately position the wafer without generating dusts. CONSTITUTION:The method for conveying a wafer comprises the steps of placing a wafer 1 removed from a wafer carrier 2 on a stage 4, then picking up the image of the wafer 1 by a CCD camera 6a, position-detecting the wafer 1 from the image in a rotating direction and a surface direction, and then moving a wafer conveyor 5 to a position of the wafer 1 based on a result of the detected position. Further, the wafer 1 may be positioned in its rotating direction by rotating the stage 4 based on a result of the detected position of the rotating direction.
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