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    1.
    发明专利
    未知

    公开(公告)号：ES2193332T3

    公开(公告)日：2003-11-01

    申请号：ES97308494

    申请日：1997-10-24

    Applicant: SONY CORP

    Inventor： KURA JUMPEI

    IPC: G11B20/10 ,  G11B20/14

    Abstract: A digital signal reproduction circuit is capable of controlling a transfer function of a waveform equalization circuit so that a synchronous clock can be generated with an optimal transfer characteristic. The digital signal reproduction circuit (1) includes: a waveform equalization block (10) for waveform-equalizing a regenerative signal, a binarization block (20) for binarizing the waveform-equalized regenerative signal, a synchronous clock reproduction block (30) for generating a synchronous clock from the binarized signal, and a waveform equalization control block (40) for controlling a transfer function of the waveform equalization block (10) according to a jitter component between the synchronous clock and the binarized signal. The waveform equalization control block (40) is supplied with a phase difference signal between the binarized signal and the synchronous signal so as to obtain an optimal value of the transfer function of the waveform equalization block (10) by using a microcomputer, for example. The transfer function is controlled so as to reduce the jitter component of the synchronous clock.

    3.
    发明专利
    未知

    公开(公告)号：DE602006011260D1

    公开(公告)日：2010-02-04

    申请号：DE602006011260

    申请日：2006-11-20

    Applicant: SONY CORP

    Inventor： MORIMOTO TADATSUGU ,  FUJIMOTO TAKASHI ,  HAYASHIDA YOSHIE ,  FUKUDA RUMI ,  KURA JUMPEI ,  YUWAKI TAKESHI

    IPC: G11B7/125

    Abstract: An optical disk recording apparatus includes an optical pickup (6) that emits laser light to illuminate a recording surface (2A) of an optical disk (2), receives reflected light resulting from the laser light reflected off the recording surface (2A), and generates a light reception signal based on the thus received reflected light; a laser power controller that sets a laser power setting and controls the power of the laser light emitted from the optical pickup based on the thus set laser power setting; and a signal generator (9) that, when a plurality of trial write areas provided on the recording surface of the optical disk are successively illuminated with the laser light in order to write trial write data, generates a timing notification signal that notifies laser arrival timing when the laser light sequentially reaches trial write start positions of the plurality of trial write areas based on the light reception signal generated by the optical pickup (6).

    4.
    发明专利
    未知

    公开(公告)号：AT238601T

    公开(公告)日：2003-05-15

    申请号：AT97308494

    申请日：1997-10-24

    Applicant: SONY CORP

    Inventor： KURA JUMPEI

    IPC: G11B20/10 ,  G11B20/14

    Abstract: A digital signal reproduction circuit is capable of controlling a transfer function of a waveform equalization circuit so that a synchronous clock can be generated with an optimal transfer characteristic. The digital signal reproduction circuit (1) includes: a waveform equalization block (10) for waveform-equalizing a regenerative signal, a binarization block (20) for binarizing the waveform-equalized regenerative signal, a synchronous clock reproduction block (30) for generating a synchronous clock from the binarized signal, and a waveform equalization control block (40) for controlling a transfer function of the waveform equalization block (10) according to a jitter component between the synchronous clock and the binarized signal. The waveform equalization control block (40) is supplied with a phase difference signal between the binarized signal and the synchronous signal so as to obtain an optimal value of the transfer function of the waveform equalization block (10) by using a microcomputer, for example. The transfer function is controlled so as to reduce the jitter component of the synchronous clock.

    DIGITAL SIGNAL REPRODUCING CIRCUIT
    5.
    发明专利
    DIGITAL SIGNAL REPRODUCING CIRCUIT 未知

    公开(公告)号：MY117953A

    公开(公告)日：2004-08-30

    申请号：MYPI9801177

    申请日：1998-03-18

    Applicant: SONY CORP

    Inventor： YOSHIMURA SHUNJI ,  KURA JUMPEI

    IPC: G11B7/005 ,  G11B7/00 ,  G11B20/14 ,  G11B20/10 ,  H03L7/08 ,  H03L7/085

    Abstract: A DIGITAL SIGNAL REPRODUCING CIRCUIT(2) WHICH ENABLES PRECISE MEASUREMENT OF A PHASE DIFFERENCE AND JITTER COMPONENTS OF REPRODUCTION SIGNALS WHILE REALIZING MINIATURIZATION OF THE CIRCUIT IS DISCLOSED. THE DIGITAL SIGNAL REPRODUCING CIRCUIT (2)HAS A PHASE COMPARATOR(5) FOR DETECTING A PHASE DIFFERENCE BY USING SAMPLED VALUES BEFORE AND AFTER AN EDGE PORTION OF A REPRODUCTION SIGNAL FROM AN OPTICAL DISC OUTPUTTED FROM AN A/D CONVERTER(4), AND A JITTER MEASURING SECTION(9) FOR DETECTING A JITTER DETECTION SIGNAL ON THE BASIS OF UNEVENNESS OF THE PHASE DIFFERENCE OBTAINED BY THE PHASE COMPARATOR.

    6.
    发明专利
    未知

    公开(公告)号：DE69721183T2

    公开(公告)日：2004-02-26

    申请号：DE69721183

    申请日：1997-10-24

    Applicant: SONY CORP

    Inventor： KURA JUMPEI

    IPC: G11B20/10 ,  G11B20/14

    Abstract: A digital signal reproduction circuit is capable of controlling a transfer function of a waveform equalization circuit so that a synchronous clock can be generated with an optimal transfer characteristic. The digital signal reproduction circuit (1) includes: a waveform equalization block (10) for waveform-equalizing a regenerative signal, a binarization block (20) for binarizing the waveform-equalized regenerative signal, a synchronous clock reproduction block (30) for generating a synchronous clock from the binarized signal, and a waveform equalization control block (40) for controlling a transfer function of the waveform equalization block (10) according to a jitter component between the synchronous clock and the binarized signal. The waveform equalization control block (40) is supplied with a phase difference signal between the binarized signal and the synchronous signal so as to obtain an optimal value of the transfer function of the waveform equalization block (10) by using a microcomputer, for example. The transfer function is controlled so as to reduce the jitter component of the synchronous clock.

    7.
    发明专利
    未知

    公开(公告)号：DE69721183D1

    公开(公告)日：2003-05-28

    申请号：DE69721183

    申请日：1997-10-24

    Applicant: SONY CORP

    Inventor： KURA JUMPEI

    IPC: G11B20/10 ,  G11B20/14

    Abstract: A digital signal reproduction circuit is capable of controlling a transfer function of a waveform equalization circuit so that a synchronous clock can be generated with an optimal transfer characteristic. The digital signal reproduction circuit (1) includes: a waveform equalization block (10) for waveform-equalizing a regenerative signal, a binarization block (20) for binarizing the waveform-equalized regenerative signal, a synchronous clock reproduction block (30) for generating a synchronous clock from the binarized signal, and a waveform equalization control block (40) for controlling a transfer function of the waveform equalization block (10) according to a jitter component between the synchronous clock and the binarized signal. The waveform equalization control block (40) is supplied with a phase difference signal between the binarized signal and the synchronous signal so as to obtain an optimal value of the transfer function of the waveform equalization block (10) by using a microcomputer, for example. The transfer function is controlled so as to reduce the jitter component of the synchronous clock.

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