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公开(公告)号:JP2001056984A
公开(公告)日:2001-02-27
申请号:JP23246099
申请日:1999-08-19
Applicant: SONY CORP
Inventor: OGAWA YASUHIRO
IPC: G11B15/10
Abstract: PROBLEM TO BE SOLVED: To drive a control target irrespective of a control method whether the control target is mode-driven or command-driven, by automatically converting an instruction transmitted in a target mode into a command instruction, and sending it out to a command communication interface. SOLUTION: A mode-command converter 10 comprises a mode comparison means 16 configuring a mode-command conversion part 9 and a command generating means 17. The mode comparison means 16 compares a target mode TM1 from a mode drive generating device 11 with an operation mode AM1 from a control target 13 and sends out the comparison result CR. The command generating means 17 sends out a control command CC to the control target 13 via a command communication interface 18 based on the comparison result CR, the target mode TM1, the operation mode AM1 outputted from the command communication interface 18 via the control target 13, and a control permission signal CP.
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公开(公告)号:JPH0731169A
公开(公告)日:1995-01-31
申请号:JP16812193
申请日:1993-07-07
Applicant: SONY CORP
Inventor: OGAWA YASUHIRO , SHIMADA KEIICHIRO , OKUMOTO KOJI
IPC: G11B15/473 , H02P1/04 , H02P1/18
Abstract: PURPOSE:To shorten the settling time when a motor is started. CONSTITUTION:Motor drive voltage is fed from a microcomputor 100 to a motor 200 through a switching diode 9 and a rotational speed detection signal is delivered to a motor speed input. An acceleration circuit 300 is additionally provided and the D/A converted output from the microcomputor 100 is grounded through a resistor 1 and connected with the base of an npn transistor 3 through a resistor 2. The transistor 3 has a grounded emitter and a collector connected with the power supply terminal 5 of +Vcc through a resistor 4 and also connected with the base of an npn transistor 6. The transistor 6 has a collector connected with the power supply terminal 5 and an emitter connected with the motor 200 through a switching diode 7. A capacitor 8 is also connected between the power supply terminal 5 and the ground.
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公开(公告)号:JPH06253566A
公开(公告)日:1994-09-09
申请号:JP6115193
申请日:1993-02-25
Applicant: SONY CORP
Inventor: SANO YONAKO , OGAWA YASUHIRO , OKUMOTO KOJI
IPC: G11B15/467 , G11B15/473 , G11B15/48 , G11B19/247 , G11B19/28 , H02P29/00 , H02P29/20 , H02P5/00
Abstract: PURPOSE:To provide a controller for allowing quick rise of rotational speed and rotational phase of a rotator upto target levels. CONSTITUTION:A controller is started to raise the rotational speed of a rotator upto a first target speed which is different by 1/5-1/6 from a final target speed (Step ST1, 2). When the first target speed is reached, phase difference is monitored between an external reference signal corresponding to the final target speed and the rotator. When the difference comes within a predetermined range, acceleration from the first target speed to the final target speed is started (Step ST3, 4). The phase difference range is set such that the rotational phase is matched with that of the reference signal upon reaching the final target speed.
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公开(公告)号:JPH10106071A
公开(公告)日:1998-04-24
申请号:JP25949796
申请日:1996-09-30
Applicant: SONY CORP
Inventor: TAMAI HISAMI , YAZAWA YUICHI , OGAWA YASUHIRO
IPC: H04N5/7826 , G11B15/46 , H02P29/00 , H04N5/782 , H02P5/00
Abstract: PROBLEM TO BE SOLVED: To control fully automatically and to eliminate fear of generating human errors and the like. SOLUTION: An FG(frequency generator) 4 is provided in a capstan 2 for moving a magnetic tape 1 and a capstan motor 3. The positive and negative outputs of this FG 4 are supplied to a comparator 6 through an amplifier 5, and compared with a voltage level (a), with waveform shaping performed. In addition, with a shaped pulse signal supplied to a micro computer 7 for servo processing, a driving signal formed by this micro computer 7 is supplied to the capstan motor 3 through a driving circuit 8. Further, the arbitrary voltage level (a) formed by the micro computer 7 is supplied to the comparator 6 through a low-pass filter 9. As a result, waveform shaping is performed for the output signal from the FG 4 by this comparator 6 and also, the duty ratio of this shaped pulse signal is adjusted by arbitrarily controlling the voltage level (a) by the micro computer 7.
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公开(公告)号:JP2000076736A
公开(公告)日:2000-03-14
申请号:JP24338798
申请日:1998-08-28
Inventor: OGAWA YASUHIRO
IPC: H04N5/91 , G11B15/02 , G11B27/02 , G11B27/032
Abstract: PROBLEM TO BE SOLVED: To enable a sub-tape to be automatically made out when the dubbing is made for the master tape by stopping the recording operation of a recorder in accordance with the output detected by a detecting circuit when the unrecorded section of the master tape is reproduced by a reproducing device at the time of dubbing. SOLUTION: The recorder 12 is made to the recording pause state by supplying a control signal S12 to the recorder 12 from a microcomputer 13, and the reproducing device 11 is made to the reproducing state from the head of the master tape by supplying a control signal S11 to the reproducing device 11. Since the begining part of the master tape is the unrecorded section, the detected signal 22 is in the 'L' level, and the reproducing state is continued for the reproducing device 11 and also the recording pause state is continued for the recorder 12. When the reproduction of the reproducing device 11 is progressed to the leader of the recorded section of master tape, the recorder 12 is transferred to the recording state by the control signal S12 as the result that a video signal SPB is reproduced to become S22='H', then the dubbing for the recorded section of the master tape is progressed from the head of the sub-tape.
Abstract translation: 要解决的问题:当主控制器的未记录部分根据检测电路检测到的输出停止录像机的记录操作,当对主磁带进行转录时,能够自动制作副磁带 在配音时,磁带由再现装置再现。 解决方案:通过从微计算机13向记录器12提供控制信号S12使记录器12成为记录暂停状态,并且通过提供控制信号使再现装置11从主磁带的磁头变为再现状态 由于主磁带的起始部分是未记录部分,检测信号22处于“L”电平,再现装置11继续重放状态,并且记录暂停状态为 继续用于记录器12.当再现装置11的再现进行到主磁带的记录部分的前导时,记录器12被控制信号S12转移到记录状态,结果是视频信号SPB是 再现为S22 ='H',则从磁带的磁头开始对主磁带的记录部分进行转录。
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公开(公告)号:JPH07121946A
公开(公告)日:1995-05-12
申请号:JP29010693
申请日:1993-10-26
Applicant: SONY CORP
Inventor: OGAWA YASUHIRO , SHIMADA KEIICHIRO , OKUMOTO KOJI
IPC: G11B15/473
Abstract: PURPOSE:To surely shorten the time elapsed until a rotary drum reaches a steady operation. CONSTITUTION:The synchronous state of a video signal is detected by a synchronous-state detection part 16. When it is detected by the synchronous-state detection part 16 that the state is externally synchronous, the rotational speed of a rotary drum 1 is set at the speed of an output (the signal of a first target speed) from a speed-reference-signal generation part 12. When the rotary drum 1 reaches the first target speed, the rotary drum 1 is accelerated so as to become a final target speed. In addition, the phase of the rotary drum 1 synchronized with a synchronizing signal which is output from a synchronizing-signal generation part 14. On the other hand, when it is detected by the synchronous- state detection part 16 that the state is internally synchronous, a trigger pulse which is output from a reset-trigger generation part 19 is supplied to a phase- difference-signal generation part 13. Thereby, a phase reference signal as an output from the phase-reference-signal generation part 13 is reset, and the phase of the phase reference signal is adjusted to the phase of the rotary drum 1.
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公开(公告)号:JPH0729262A
公开(公告)日:1995-01-31
申请号:JP17173293
申请日:1993-07-12
Applicant: SONY CORP
Inventor: OGAWA YASUHIRO , SHIMADA KEIICHIRO , OKUMOTO KOJI
IPC: G11B15/473 , H02P29/00 , H02P5/00
Abstract: PURPOSE:To shorten an operation time required at the time of reproducing from the state where a drum is stopped. CONSTITUTION:PG, FG signals of the drum 100 are outputted from detection circuits 1, 2, and the error amounts are detected by error detection circuits 3, 4, and after the outputs of gain adjusters 5, 6 are added by an adder 7 to be supplied to an amplifier 8 and a motor driver 9, and a voltage applied to the drum 100 is controlled. In this device, a phase error is formed by comparing a synchronizing signal from a phase reference generator 10 with the PG signal, and a speed error signal is formed by comparing a reference signal from a speed reference generator 11 with the FG signal. Further, a reset means 12 for the synchronizing signal from the phase reference generator 10 is provided, and the signal from the error detection circuit 4 is supplied to an operation circuit 200 of a speed and acceleration, and the reset means 12 is driven by the output of the circuit 200.
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