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公开(公告)号:JPS5293259A
公开(公告)日:1977-08-05
申请号:JP915776
申请日:1976-01-30
Applicant: SONY CORP
Inventor: TSUCHIYA AKIO , AKAZAWA SUSUMU , MURAKAMI KIYOUICHI
Abstract: PURPOSE:To relax the restriction of the pulse width of the phase inverted signal by connecting the third gate circuit for a phase inversion to the closed loop being composed through the arrangement of the first and the second gate circuits between the main and the servant flip-flop circuits.
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公开(公告)号:JPS52135242A
公开(公告)日:1977-11-12
申请号:JP5246976
申请日:1976-05-07
Applicant: SONY CORP
Inventor: TSUCHIYA AKIO , MURAKAMI KIYOUICHI , AKAZAWA SUSUMU
Abstract: PURPOSE:In an oscillating circuit connecting in series a condenser which is connected to the parallel-connected variable resistor and coil, phase adjustment is carried out by fixing a level of output voltage with a help of the variable resistor, so that design of the circuit is made easily.
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公开(公告)号:JPS52109824A
公开(公告)日:1977-09-14
申请号:JP2631376
申请日:1976-03-11
Applicant: SONY CORP
Inventor: TSUCHIYA AKIO
Abstract: PURPOSE:To avoid the differet hue on the picture of color TV receiver for left and right, by making always equal the voltage corresponding to the position of the rising and trailing edge of the sampling pulse of the signal to be compared, and by completely smoothing the hold voltage.
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公开(公告)号:JPS52105731A
公开(公告)日:1977-09-05
申请号:JP2239476
申请日:1976-03-02
Applicant: SONY CORP
Inventor: SUMI TAKAO , TSUCHIYA AKIO
Abstract: PURPOSE:To provide a low-price color picture signal reproducer simple in circuit construction, by setting the frequency of a variable frequency oscillator as a horizontal frequency fH multiplied by 175/4.
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公开(公告)号:JPS5264223A
公开(公告)日:1977-05-27
申请号:JP13980775
申请日:1975-11-21
Applicant: SONY CORP
Inventor: MORITA AKIO , ISHIGAKI YOSHIO , TSUCHIYA AKIO
Abstract: PURPOSE:Whether or not the cue signal is contained in the color vodeo signal is detected if it is contained, another video signal instead of the first vodeo signal is reproduced as the picture image. As a result, correct hue adjustment becomes possible.
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公开(公告)号:JPS5252327A
公开(公告)日:1977-04-27
申请号:JP12870175
申请日:1975-10-24
Applicant: SONY CORP
Inventor: MURAKAMI KIYOUICHI , TSUCHIYA AKIO , AKAZAWA SUSUMU , OKABE MASAKATSU
Abstract: PURPOSE:The gate circuit is installed at input side of 1H-delay line, and is controlled only during burst period by supplying gate pulse. At the same time, the burst signal which is supplied to 1H-delay line is intercepted or reduced. Thus, picture quality deterioration can be prevented.
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公开(公告)号:JPS51123519A
公开(公告)日:1976-10-28
申请号:JP4887475
申请日:1975-04-22
Applicant: SONY CORP
Inventor: TSUCHIYA AKIO , HAMADA TAKESHI
Abstract: PURPOSE:To provide stability in the recording signal level of low frequency modulated color VTR.
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公开(公告)号:JPS5264214A
公开(公告)日:1977-05-27
申请号:JP13980575
申请日:1975-11-21
Applicant: SONY CORP
Inventor: MORITA AKIO , ISHIGAKI YOSHIO , TSUCHIYA AKIO
Abstract: PURPOSE:At the transmission side, the signal near maximum picture frequency is extracted and the carrier wave is modulated at this rising point. And at the reception side, the pulse is generated at changing point of carrier wave to be or-gated with the demodulation signal. Thus, transmission efficiency as well as reception picture quality can be increased.
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公开(公告)号:JPS51120123A
公开(公告)日:1976-10-21
申请号:JP4492775
申请日:1975-04-14
Applicant: SONY CORP
Inventor: TSUCHIYA AKIO , NARAHARA HISAAKI
Abstract: PURPOSE:To reliably match the operation of the color killer circuit of the receiver used to monitor during recording operation and the operation of the color killer circuit in the VTR.
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公开(公告)号:JPS5584098A
公开(公告)日:1980-06-24
申请号:JP15713478
申请日:1978-12-19
Applicant: SONY CORP
Inventor: TSUCHIYA AKIO , SONEDA MITSUO
IPC: G11C11/34 , G11C11/56 , G11C19/28 , G11C27/00 , G11C27/04 , H01L21/339 , H01L29/762 , H01L29/78 , H03H7/30 , H03H15/02 , H04N5/30 , H04N5/335 , H04N5/341 , H04N5/355 , H04N5/372
Abstract: PURPOSE:To realize the extraction of the good signals with no reduction of the dynamic range by extracting the output of the CCD element via the complementary transitor which is controlled by the signal of the same phase as the charge transfer clock. CONSTITUTION:Clock phi1' of the same phase as clock phi1 among clocks phi1 and phi2 transferring the signals to capacitors C0, C1, C2, C3, C4 and so on of the CCD element is applied to the base of the complementary transistor formed with pnp transistor 12 and npn transistor 11 having the emitter connection via oscillator 13. The emitter of he complementary transistor is connected to capacitor C2 of the odd- numbered CCD element, and the pulse same as the transfer clock is supplied to capacitor C2. Thus no effect of the signal is given to C2, and also no reduction is caused to the effective level of the clock due to the base-emitter capacity in case the ordinary switching transistor is used. As a result, the signals can be extracted from collector 14 of transistor 11 in a good way.
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