公开(公告)号：FR2884052A1

公开(公告)日：2006-10-06

申请号：FR0550816

申请日：2005-03-30

Applicant: ST MICROELECTRONICS CROLLES 2

Inventor： CHARBUILLET CLEMENT ,  SKOTNICKI THOMAS ,  VILLARET ALEXANDRE

IPC: H01L29/78 ,  H01L21/336

Abstract: L'invention concerne un transistor de type IMOS vertical comprenant : un empilement d'une première portion semiconductrice dopée avec des éléments dopants d'un premier type, d'une deuxième portion semiconductrice intrinsèque sensiblement non dopée, et d'une troisième portion semiconductrice dopée avec des éléments dopants d'un second type formant une diode de type PIN ; et une grille conductrice placée contre ledit empilement avec interposition d'une couche isolante.

公开(公告)号：FR2884052B1

公开(公告)日：2007-06-22

申请号：FR0550816

申请日：2005-03-30

Applicant: ST MICROELECTRONICS CROLLES 2

Inventor： CHARBUILLET CLEMENT ,  SKOTNICKI THOMAS ,  VILLARET ALEXANDRE

IPC: H01L29/78 ,  H01L21/336

Abstract: The transistor has a stack comprising a lower semiconductor portion (135) doped with N-type doping component, an intrinsic semiconductor portion (136) and an upper semiconductor portion (130) doped with P-type doping component so as to form a vertical PIN type diode. A conductive gate (181) is placed against the stack with interposition of an insulating layer (150) and has thickness less than the stack, where conductive spacers of the gate are connected to a gate terminal, and the lower and upper semiconductor portions are connected to source and drain terminals. An independent claim is also included for a method of formation of a vertical impact ionization metal oxide semiconductor transistor (IMOS) transistor.