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    2.
    发明专利
    未知

    公开(公告)号：DE60032078D1

    公开(公告)日：2007-01-11

    申请号：DE60032078

    申请日：2000-08-24

    Applicant: ST MICROELECTRONICS SA

    Inventor： GRASSET JEAN-CHARLES

    IPC: H03D7/14

    Abstract: The device for frequency transposition implements the corresponding method for the reduction of residual of local oscillator signal in the output signal in a structure of differential Gilbert type, and includes biasing transistors (T1, T2) of output stage of differential transconductor block by subordinating the differential of emitter or source currents of transistors to a current (10) of predetermined common mode. The differential subordination is realized by relooping the emitters or sources and the bases or gates of transistors (T1,T2) of output stage, and by setting the current of common mode by the application of a reference voltage to the connected bases or gates of transistors (T3,T4) of input stage of differential amplifier with transconductance. The application of reference voltage to the bases or gates of transistors (T3,T4) is realized by use of a reference current source (SC) and a reference resistance (R3), mutually connected to a current mirror with transistors (T10,T11), where the base or gate of one transistor (T10) is connected to the bases of transistors (T3,T4) of differential amplifier. The transistors (T3,T4) are biased by a current (IE) generated by the reference current source (SC). The device for the frequency transposition comprises a differential transconductor block (BTC) for the conversion of input signal to a current differential having an input stage with transistors (T1,T2) and means for biasing the transistors, and a current switching circuit (BCC) controlled by a local oscillator connected between the output stage of transconductor circuit and the output terminal of the device. The biasing resistors (R1) are connected between the ground and the emitters or sources of transistors (T1,T2) of output stage. In a variant of the device, the transconductor block comprises an input stage with two transistors, an output stage also with two transistors, and an intermediate stage with four transistors; the collectors or drains of transistors (T3,T4) of differential amplifier are connected to the electrodes of transistors of input stage of transconductor block. The means for current generation in common mode comprise a low-pass filter (FL) of resistive-capacitive type, connected between the emitters or sources of transistors (T3,T4) and those of transistors (T1,T2). The voltage source comprises a constant current source (SC), and a reference resistance (R3) connected between the ground and the current mirror. The subordination means also comprise a current mirror with transistors (T5,T6,T7) connected between the reference current source (SC) and the collectors or drains of transistors (T3,T4) of output stage. A celullar mobile telephone comprises a device for frequency transposition of the proposed type.

    5.
    发明专利
    未知

    公开(公告)号：DE60318285D1

    公开(公告)日：2008-02-07

    申请号：DE60318285

    申请日：2003-07-04

    Applicant: ST MICROELECTRONICS SA

    Inventor： PELLAT BRUNO ,  GELLIDA SYLVIE ,  GRASSET JEAN-CHARLES ,  RIVOIRARD FREDERIC

    IPC: H03D7/14

    Abstract: The frequency converter has a transconductance module receiving the input signal and a current switching module connected to the output. The common mode static currents (Iif1, Iif2) in the output are regulated in a closed loop in response to a current proportional to a reference current (Iref) independent of the static currents at the output of the transconductance module.

    Reducing intermodulation by closed-loop base or gate node bias impedance reduction in a mobile phone receiver or transmitter
    6.
    发明专利
    Reducing intermodulation by closed-loop base or gate node bias impedance reduction in a mobile phone receiver or transmitter 未知

    公开(公告)号：GB2384125A

    公开(公告)日：2003-07-16

    申请号：GB0229787

    申请日：2002-12-20

    Applicant: ST MICROELECTRONICS SA

    Inventor： GRASSET JEAN-CHARLES ,  BOSSU ERIC

    IPC: H03F1/30 ,  H03F1/32

    Abstract: The time-averaged base-emitter voltage of a main device Q1 is stabilized by use of a reference device Q2, the drain current of which is compared with a reference current SPOL by a transconductance amplifier ATRC providing bias current to the main and reference devices. The biasing loop ensures a low base node impedance at DC and at the modulation envelope frequency, thereby improving the amplifier's intermodulation, compression and noise performance. The loop also reduces thermal drift. The main transistors may be bipolar or MOS devices. The devices Q1 and Q2 may have an area ratio. The current SCTRL, which flows in R1, may be varied to adjust the current ratio of Q1 and Q2. The amplifier may be common-emitter or common-base.

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