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公开(公告)号:FR2864720B1
公开(公告)日:2006-06-09
申请号:FR0351231
申请日:2003-12-30
Applicant: ST MICROELECTRONICS SA
Inventor: FLORENCE ARNAUD , HEURTIER JEROME
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公开(公告)号:FR2918817A1
公开(公告)日:2009-01-16
申请号:FR0756445
申请日:2007-07-12
Applicant: ST MICROELECTRONICS SA
Inventor: HEURTIER JEROME , MENARD SAMUEL , FLORENCE ARNAUD
IPC: H02M7/06 , H02M3/335 , H03K17/605 , H03K17/689
Abstract: L'invention concerne un circuit de génération d'un signal continu de commande (VC) d'un commutateur alternatif (T) référencé à un premier potentiel (M2), à partir d'un signal (Vrf) haute fréquence référencé à un deuxième potentiel (M1), comportant : un premier élément capacitif (C1) reliant une première borne d'entrée (31), destinée à recevoir le signal haute fréquence, à la cathode d'un élément de redressement (D1) dont l'anode est reliée à une première borne de sortie (23) destinée à être reliée à une borne de commande du commutateur ; et un deuxième élément capacitif (C2) reliant une deuxième borne d'entrée (32), destinée à être connectée au deuxième potentiel de référence, à une deuxième borne de sortie (24) destinée à être connectée au premier potentiel de référence, un deuxième élément de redressement (D2) reliant la cathode du premier élément de redressement à la deuxième borne de sortie.
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公开(公告)号:FR2864720A1
公开(公告)日:2005-07-01
申请号:FR0351231
申请日:2003-12-30
Applicant: ST MICROELECTRONICS SA
Inventor: FLORENCE ARNAUD , HEURTIER JEROME
Abstract: The circuit has a transistor switch (4) with a reverse input logic between an inductor (L) and a connection terminal of a load (3). A gate of the switch is coupled to a supply voltage of the inductor or to a voltage less than a source voltage (6) of the switch at the inductor side. A selection circuit selects the higher voltage between the supply voltages of the inductor and the switch. Independent claims are also included for the following: (A) a process for protecting a voltage-up converter (B) a voltage-up converter including a protection circuit.
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公开(公告)号:FR2848340B1
公开(公告)日:2005-03-18
申请号:FR0215320
申请日:2002-12-04
Applicant: ST MICROELECTRONICS SA
Inventor: HEURTIER JEROME , FLORENCE ARNAUD , GALTIE FRANCK
Abstract: A controllable rectifying element, comprising a bipolar transistor having a current input terminal connected to a control terminal by a first switch and having a current output terminal connected to the control terminal by a second switch, the turn-off and turn-on phases of the first and second switches being complementary and depending on the state desired for the rectifying element.
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公开(公告)号:FR2848340A1
公开(公告)日:2004-06-11
申请号:FR0215320
申请日:2002-12-04
Applicant: ST MICROELECTRONICS SA
Inventor: HEURTIER JEROME , FLORENCE ARNAUD , GALTIE FRANCK
Abstract: A controllable rectifying element, comprising a bipolar transistor having a current input terminal connected to a control terminal by a first switch and having a current output terminal connected to the control terminal by a second switch, the turn-off and turn-on phases of the first and second switches being complementary and depending on the state desired for the rectifying element.
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公开(公告)号:FR2816133B1
公开(公告)日:2003-04-04
申请号:FR0014001
申请日:2000-10-31
Applicant: ST MICROELECTRONICS SA
Inventor: DUCLOS FRANK , LADIRAY OLIVIER , HEURTIER JEROME
IPC: H03K5/1534 , H03K19/013 , H03K17/56
Abstract: The invention concerns a switching circuit ( 20 ) adapted to generate a pulse when there occurs a rising edge of a signal applied on an input terminal (CTRL), comprising: a first NPN type bipolar transistor (TN 2 ) whereof the transmitter is connected to the input terminal; a second transistor (TP 2 ) whereof a control electrode is connected, through a first resistor (Re 2 ), to the input terminal, the base of the first transistor being connected to a supply potential (VDD) by the second transistor in series with a second resistor (Rp 2 ); and a third transistor (TN 3 ) connecting an output terminal ( 22 ) of the switching circuit to a reference potential (GND) and whereof a control electrode is connected to the collector of the first transistor (TN 2 ).
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公开(公告)号:FR2849536B1
公开(公告)日:2007-02-23
申请号:FR0216808
申请日:2002-12-27
Applicant: ST MICROELECTRONICS SA
Inventor: HEURTIER JEROME , MENARD SAMUEL
IPC: H01L29/739 , H01L29/06 , H03K19/0175
Abstract: The circuit has a high voltage N channel MOS transistor (31), whose gate receives a control signal referred to a reference voltage (G) and source is connected to the voltage. A base of a high voltage PNP transistor (32) is connected to a drain of the MOS transistor and an emitter of the PNP transistor receives a supply voltage. A collector of the PNP transistor supplies a voltage to a control terminal of a high voltage switch.
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公开(公告)号:FR2849536A1
公开(公告)日:2004-07-02
申请号:FR0216808
申请日:2002-12-27
Applicant: ST MICROELECTRONICS SA
Inventor: HEURTIER JEROME , MENARD SAMUEL
IPC: H01L29/06 , H01L29/739 , H03K19/0175
Abstract: The circuit has a high voltage N channel MOS transistor (31), whose gate receives a control signal referred to a reference voltage (G) and source is connected to the voltage. A base of a high voltage PNP transistor (32) is connected to a drain of the MOS transistor and an emitter of the PNP transistor receives a supply voltage. A collector of the PNP transistor supplies a voltage to a control terminal of a high voltage switch.
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公开(公告)号:FR2848359A1
公开(公告)日:2004-06-11
申请号:FR0215321
申请日:2002-12-04
Applicant: ST MICROELECTRONICS SA
Inventor: FLORENCE ARNAUD , HEURTIER JEROME , GALTIE FRANCK
Abstract: The pulse width modulated generator has a slope generator (31) with a high and low reference generator (36) providing a set signal (Vdc,ERR) for the ramp slope plane. There are comparators for each reference signal (34,35) and a logic combination element (41).
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公开(公告)号:FR2816133A1
公开(公告)日:2002-05-03
申请号:FR0014001
申请日:2000-10-31
Applicant: ST MICROELECTRONICS SA
Inventor: DUCLOS FRANK , LADIRAY OLIVIER , HEURTIER JEROME
IPC: H03K5/1534 , H03K19/013 , H03K17/56
Abstract: The invention concerns a switching circuit (20) adapted to generate a pulse when there occurs a rising edge of a signal applied on an input terminal (CTRL), comprising: a first NPN type bipolar transistor (TN2) whereof the transmitter is connected to the input terminal; a second transistor (TP2) whereof a control electrode is connected, through a first resistor (Re2), to the input terminal, the base of the first transistor being connected to a supply potential (VDD) by the second transistor in series with a second resistor (Rp2); and a third transistor (TN3) connecting an output terminal (22) of the switching circuit to a reference potential (GND) and whereof a control electrode is connected to the collector of the first transistor (TN2).
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