公开(公告)号：FR2858877A1

公开(公告)日：2005-02-18

申请号：FR0350418

申请日：2003-08-11

Applicant: ST MICROELECTRONICS SA

Inventor： MARTINET BERTRAND ,  MARTY MICHEL ,  CHEVALIER PASCAL ,  CHANTRE ALAIN

IPC: H01L21/331 ,  H01L29/08 ,  H01L29/737

Abstract: A method for forming a heterojunction bipolar transistor including the steps of: forming in a semiconductor substrate a collector area of a first doping type; growing by epitaxy above a portion of the collector area a silicon/germanium layer of a second doping type forming a base area; forming above the silicon/germanium layer a sacrificial emitter formed of a material selectively etchable with respect to the silicon/germanium layer and with respect to the layers and consecutively-formed insulating spacers; forming first insulating spacers on the sides of the sacrificial emitter; growing by epitaxy a silicon layer above the exposed portions of the silicon/germanium layer; forming second insulating spacers adjacent to the first spacers and laid on the silicon layer; covering the entire structure with an insulating layer; partially removing the insulating layer above the sacrificial emitter and removing the sacrificial emitter; filling the space previously taken up by the sacrificial emitter with a semiconductor material of the first doping type.

公开(公告)号：FR2884050B1

公开(公告)日：2007-07-20

申请号：FR0503201

申请日：2005-04-01

Applicant: ST MICROELECTRONICS SA

Inventor： COTTIN DENIS ,  SCHWARTZMANN THIERRY ,  VILDEUIL JEAN CHARLES ,  MARTINET BERTRAND ,  TAUPIN SOPHIE ,  MARIN MATHIEU

IPC: H01L27/06

公开(公告)号：FR2854494A1

公开(公告)日：2004-11-05

申请号：FR0305419

申请日：2003-05-02

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  MARTINET BERTRAND ,  FELLOUS CYRIL

IPC: H01L21/331

Abstract: The method involves forming a sacrificial block acting as a window to emitter, on an encapsulation layer laid on a base layer (2). A sacrificial layer is laid on a base contact layer (7). Sum of thicknesses of the layer (7) and the sacrificial layer is equal to that of the encapsulation layer and block. The block and encapsulation layer are removed and an emitter layer (9) is laid. The sacrificial layer is removed. The sacrificial block is formed at a level of a base-emitter junction.

公开(公告)号：FR2884050A1

公开(公告)日：2006-10-06

申请号：FR0503201

申请日：2005-04-01

Applicant: ST MICROELECTRONICS SA

Inventor： COTTIN DENIS ,  SCHWARTZMANN THIERRY ,  VILDEUIL JEAN CHARLES ,  MARTINET BERTRAND ,  TAUPIN SOPHIE ,  MARIN MATHIEU

IPC: H01L27/06

Abstract: Circuit intégré 1 comprenant un substrat 2 et une résistance, la résistance comprenant au moins deux puits d'accès 7, 8 d'un premier type de conductivité et une couche enterrée profonde 5 reliant électriquement lesdits puits collecteur, la couche enterrée profonde 5 étant recouverte au moins en partie par une région de conductivité opposée 6.

公开(公告)号：FR2858877B1

公开(公告)日：2005-10-21

申请号：FR0350418

申请日：2003-08-11

Applicant: ST MICROELECTRONICS SA

Inventor： MARTINET BERTRAND ,  MARTY MICHEL ,  CHEVALIER PASCAL ,  CHANTRE ALAIN

IPC: H01L21/331 ,  H01L29/08 ,  H01L29/737

Abstract: A method for forming a heterojunction bipolar transistor including the steps of: forming in a semiconductor substrate a collector area of a first doping type; growing by epitaxy above a portion of the collector area a silicon/germanium layer of a second doping type forming a base area; forming above the silicon/germanium layer a sacrificial emitter formed of a material selectively etchable with respect to the silicon/germanium layer and with respect to the layers and consecutively-formed insulating spacers; forming first insulating spacers on the sides of the sacrificial emitter; growing by epitaxy a silicon layer above the exposed portions of the silicon/germanium layer; forming second insulating spacers adjacent to the first spacers and laid on the silicon layer; covering the entire structure with an insulating layer; partially removing the insulating layer above the sacrificial emitter and removing the sacrificial emitter; filling the space previously taken up by the sacrificial emitter with a semiconductor material of the first doping type.