公开(公告)号：FR2812417A1

公开(公告)日：2002-02-01

申请号：FR0009882

申请日：2000-07-27

Applicant: ST MICROELECTRONICS SA

Inventor： SANCHES JOSE ,  CORNERO MARCO ,  SANTANA MIGUEL ,  GUILLAUME PHILIPPE ,  DAVEAU JEAN MARC ,  LEPLEY THIERRY ,  PAULIN PIERRE ,  HARRAND MICHEL

IPC: G06F9/38 ,  G06F9/34 ,  G06F7/38

Abstract: VLIW (very large instruction word) processor (20) for execution of instructions of variable size comprising multiple elementary codes comprises: a program memory with multiple memory banks; and means for reading the program memory. Said means comprises means for applying incremental addresses in a cyclic manner to the program memory and means for filtering out codes that that do not belong to an instruction to be executed by means of parallel bits accompanying the codes. The invention also relates to a corresponding method for reading instructions of variable size.