公开(公告)号：DE60029168D1

公开(公告)日：2006-08-17

申请号：DE60029168

申请日：2000-08-08

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  SIMONNET JEAN-MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/747

Abstract: The bidirectional switch incorporating two thyristors and a transistor is formed in a semiconductor substrate (1) of n-type conductivity and comprises the first vertical thyristor (Th1) with a rear-face layer (2) of p-type conductivity, the second vertical thyristor (Th2) with a rear-face layer (6) of n-type conductivity, an auxiliary thyristor with the rear-face layer (2) common with that of the first thyristor, a peripheral region (7) of p-type conductivity connecting the rear-face layer of auxiliary thyristor to the thyristor situated on the other side of substrate, the first metallization (M1) on the rear face of substrate, and the second metallization (M2) connecting the front-face layers of the first and second thyristors. The supplementary region (10) has the function of an insulator layer between the rear face of auxiliary thyristor and the first metallization. The supplementary region (10) is of semiconductor material of n-type conductivity, or of silicon dioxide (SiO2). The thickness of supplementary region (10) is less than that of the rear-face region (6) of second thyristor, the latter is about 10-15 micrometer. The main current of auxiliary thyristor is diverted because of the presence of supplementary layer, as well as the base current of transistor, which is a part of auxiliary thyristor.

公开(公告)号：DE60029168T2

公开(公告)日：2007-08-23

申请号：DE60029168

申请日：2000-08-08

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  SIMONNET JEAN-MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/747

Abstract: The bidirectional switch incorporating two thyristors and a transistor is formed in a semiconductor substrate (1) of n-type conductivity and comprises the first vertical thyristor (Th1) with a rear-face layer (2) of p-type conductivity, the second vertical thyristor (Th2) with a rear-face layer (6) of n-type conductivity, an auxiliary thyristor with the rear-face layer (2) common with that of the first thyristor, a peripheral region (7) of p-type conductivity connecting the rear-face layer of auxiliary thyristor to the thyristor situated on the other side of substrate, the first metallization (M1) on the rear face of substrate, and the second metallization (M2) connecting the front-face layers of the first and second thyristors. The supplementary region (10) has the function of an insulator layer between the rear face of auxiliary thyristor and the first metallization. The supplementary region (10) is of semiconductor material of n-type conductivity, or of silicon dioxide (SiO2). The thickness of supplementary region (10) is less than that of the rear-face region (6) of second thyristor, the latter is about 10-15 micrometer. The main current of auxiliary thyristor is diverted because of the presence of supplementary layer, as well as the base current of transistor, which is a part of auxiliary thyristor.

公开(公告)号：DE69937388D1

公开(公告)日：2007-12-06

申请号：DE69937388

申请日：1999-08-24

Applicant: ST MICROELECTRONICS SA

Inventor： GUITTON FABRICE ,  MAGNON DIDIER ,  SIMONNET JEAN-MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/74 ,  H03K17/16 ,  H01L21/822 ,  H01L27/06 ,  H01L29/744 ,  H03K17/732

Abstract: A one-way switching circuit of the type including a gate tun-off thyristor biased to be normally on, further includes, between the gate and a supply line, a capacitor and a controllable switch connected in parallel.

公开(公告)号：DE60038353D1

公开(公告)日：2008-04-30

申请号：DE60038353

申请日：2000-11-02

Applicant: ST MICROELECTRONICS SA

Inventor： SIMONNET JEAN-MICHEL

IPC: H01L29/747 ,  H01L29/74

Abstract: The detector of on-off states of a power component of vertical architecture is formed in a semiconductor substrate (1), which is of a weakly doped n-type conductivity, having front and rear faces, and an insulation wall (7), which is of p-type conductivity, that is opposite to that of the substrate, which surrounds a region (21) corresponding to the power component. The detector is formed at the exterior of the insulation wall, and is constituted by a vertical component having the on-off states switched by parasitic charges propagating to a region (22) exterior of the insulation wall when the power component is in on state. The detector is constituted by a vertical transistor with the substrate as the base. The region (22) is preferentially limited by an insulation wall (23). The vertical transistor comprises, on the side of lower face, a deep diffusion region formed at the same time as the diffusion of insulation wall of lower face. The detector can comprise several vertical transistors with the emitter regions, formed on the side of lower face, having different diffusion vertical transistors with the emitter regions, formed on the side of lower face, having different diffusion depths. The detector component has a metallization (25) cover connected to a potential fixed with respect to the reference potential. The metallization (24) is connected to a low supply voltage (Vcc) by the intermediary of a high-value resistance (R).

公开(公告)号：DE69730761T2

公开(公告)日：2005-09-29

申请号：DE69730761

申请日：1997-01-24

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC ,  SIMONNET JEAN-MICHEL

IPC: H01L21/336 ,  H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01L29/735 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861

Abstract: A method of regulating the gain or sensitivity of a lateral component, formed in the upper surface of a first conductivity type semiconductor wafer (N1), involves subjecting the back face to no doping or to overdoping of first conductivity type, when the gain or sensitivity of the lateral component is to be reduced, and to second conductivity type doping, when the gain or sensitivity of the lateral component is to be increased. Also claimed are (i) a lateral transistor or thyristor formed in the front face of a lightly doped first conductivity type semiconductor, a second conductivity type layer being provided on the back face of the wafer; and (ii) a p-n junction diode assembly formed in the front face of a lightly doped first conductivity type semiconductor wafer, the back face of the substrate including a heavily doped first conductivity type region.

公开(公告)号：DE69730761D1

公开(公告)日：2004-10-28

申请号：DE69730761

申请日：1997-01-24

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC ,  SIMONNET JEAN-MICHEL

IPC: H01L21/336 ,  H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01L29/735 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861

Abstract: A method of regulating the gain or sensitivity of a lateral component, formed in the upper surface of a first conductivity type semiconductor wafer (N1), involves subjecting the back face to no doping or to overdoping of first conductivity type, when the gain or sensitivity of the lateral component is to be reduced, and to second conductivity type doping, when the gain or sensitivity of the lateral component is to be increased. Also claimed are (i) a lateral transistor or thyristor formed in the front face of a lightly doped first conductivity type semiconductor, a second conductivity type layer being provided on the back face of the wafer; and (ii) a p-n junction diode assembly formed in the front face of a lightly doped first conductivity type semiconductor wafer, the back face of the substrate including a heavily doped first conductivity type region.