公开(公告)号：JP2000100925A

公开(公告)日：2000-04-07

申请号：JP24739199

申请日：1999-09-01

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK

IPC: H01L29/74 ,  H01L21/74 ,  H01L21/761 ,  H01L21/822 ,  H01L27/06 ,  H01L27/08 ,  H01L21/06

Abstract: PROBLEM TO BE SOLVED: To provide an insulation wall for isolation of an element having a small surface occupation area of a semiconductor and a small leakage current. SOLUTION: The fundamental element is formed in the first conductivity type semiconductor wafers 61 and 62. At least one fundamental element in a wafer functions at high current density, the second conductivity type insulating wall, where the fundamental element is isolated, has at least two fundamental walls 63 and 64 to be isolated on the part of wafer material, and the above- mentioned part is coupled to fundamental potential.

公开(公告)号：JPH11317532A

公开(公告)日：1999-11-16

申请号：JP31830498

申请日：1998-10-22

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK

IPC: G11B5/40 ,  H01L21/822 ,  H01L23/60 ,  H01L27/02 ,  H01L27/04 ,  H01L27/08 ,  H01L29/861 ,  H05F3/02

Abstract: PROBLEM TO BE SOLVED: To obtain a protective device of a structure, wherein the device has a low electrostatic capacity for protection against electrostatic discharge(ESD), the manufacture of the device is executed in the form of a monolithic silicon chip, and the device is formed of an assembly of a constitution, wherein two groups of diodes connected in series are arranged in parallel to each other. SOLUTION: This assembly is of a constitution, for which two groups of diodes of a first group comprising a second diode D2 and a first diode D1, arranged in series with the diode D2 and a second group comprising a fourth diode D4 and a third diode D3 arranged in series with the diode D4 are provided within a first conductivity type semiconductor substrate 20 and the two groups of the diodes are arranged in parallel to each other. Each of the first and third diodes D1 and D3 in this assembly comprises other conductivity type adjacent regions, which are lightly doped with the second conductivity-type impurities and are formed into an isolated well, each of the second and fourth diodes D2 and D4 in the assembly comprises the other conductivity-type regions, separated from each other and metal materials M1 to M4 are connected with diode electrodes for forming parallel assemblies in a desirable series.

公开(公告)号：FR2797525B1

公开(公告)日：2001-10-12

申请号：FR9910413

申请日：1999-08-09

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  SIMONNET JEAN MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/747

Abstract: A monolithic bidirectional switch formed in a semiconductor substrate of a first conductivity type having a front surface and a rear surface, including a first main vertical thyristor, the rear surface layer of which is of the second conductivity type, a second main vertical thyristor, the rear surface layer of which is of the first conductivity type. A structure for triggering each of the first and second main thyristors is arranged to face regions mutually distant from the two main thyristors, the neighboring portions of which correspond to a region for which, for the first main thyristor, a short-circuit area between cathode and cathode gate is formed.

公开(公告)号：DE60029168T2

公开(公告)日：2007-08-23

申请号：DE60029168

申请日：2000-08-08

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  SIMONNET JEAN-MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/747

Abstract: The bidirectional switch incorporating two thyristors and a transistor is formed in a semiconductor substrate (1) of n-type conductivity and comprises the first vertical thyristor (Th1) with a rear-face layer (2) of p-type conductivity, the second vertical thyristor (Th2) with a rear-face layer (6) of n-type conductivity, an auxiliary thyristor with the rear-face layer (2) common with that of the first thyristor, a peripheral region (7) of p-type conductivity connecting the rear-face layer of auxiliary thyristor to the thyristor situated on the other side of substrate, the first metallization (M1) on the rear face of substrate, and the second metallization (M2) connecting the front-face layers of the first and second thyristors. The supplementary region (10) has the function of an insulator layer between the rear face of auxiliary thyristor and the first metallization. The supplementary region (10) is of semiconductor material of n-type conductivity, or of silicon dioxide (SiO2). The thickness of supplementary region (10) is less than that of the rear-face region (6) of second thyristor, the latter is about 10-15 micrometer. The main current of auxiliary thyristor is diverted because of the presence of supplementary layer, as well as the base current of transistor, which is a part of auxiliary thyristor.

公开(公告)号：DE69837071D1

公开(公告)日：2007-03-29

申请号：DE69837071

申请日：1998-10-23

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK

IPC: G11B5/40 ,  H01L27/08 ,  H01L21/822 ,  H01L23/60 ,  H01L27/02 ,  H01L27/04 ,  H01L29/861 ,  H05F3/02

公开(公告)号：DE60117851D1

公开(公告)日：2006-05-04

申请号：DE60117851

申请日：2001-12-28

Applicant: ST MICROELECTRONICS SA

Inventor： GIMONET SOPHIE ,  DUCLOS FRANCK

IPC: H01L29/747

Abstract: The invention concerns a pulsed bistable bidirectional electronic switch comprising a monolithic semiconductor circuit formed from a substrate ( 1 ) whereof the rear surface (A 2 ) is coated with a metallization connected to earth. Said circuit comprises a vertical bidirectional switch (T 1 , T 2 ) provided with a first gate terminal (M 3 ), whereof the main electrode (A 1 ) on the side of the front surface is connected to a load and an alternating current supply; a horizontal thyristor (T 3 ) comprising an upper layer ( 4 ) of the vertical bidirectional switch, a first P-type region ( 11 ), and a second N-type region ( 12 ) formed in the first region; a second gate terminal (G 1 ) connected to one of the first and second regions, the other being connected to earth. A capacitor (C) is connected to the first gate terminal (G 3 ) and to the alternating current supply (VAC).

公开(公告)号：FR2797113B1

公开(公告)日：2001-10-12

申请号：FR9909986

申请日：1999-07-28

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  LADIRAY OLIVIER ,  SIMONNET JEAN MICHEL

IPC: H02M1/08 ,  H03K17/13 ,  H01L27/06

Abstract: The circuit for the zero voltage control of a bidirectional switch (TR) comprises a pair of complementary transistors (Q1, Q2) connected in parallel between the gate (G) and the reference terminal (A1) of bidirectional switch, where the gate of bidirectional switch is connected to a control signal source via a resistor (R2), and the control electrodes of transistors are connected to the second terminal (A2) of bidirectional switch via a high-value resistor (R1), a pair of Zener diodes (Z1, Z2) connected between the second resistor (R1) and each control electrode of transistors according to polarity so to turn the transistors on when the Zener threshold is passed. The control circuit is implemented in the same semiconductor substrate as the bidirectional switch (TR). In the first embodiment, the control electrodes of transistors are interconnected, and the Zener diodes (Z1, Z2) are connected in series and in opposition between the second resistor (R1) and the point of interconnection of control electrodes. In the second embodiment, the control electrodes of transistors are separated, and the Zener diodes are connected in opposition between the second resistor (R1) and each electrode. The second resistor (R1) is implemented in the same part of substrate, which is of first conductivity type, as the bidirectional switch (TR). The Zener diodes (Z1, Z2) are implemented on the side of front face of the substrate in a layer of second conductivity type, and comprise two regions of first conductivity type joined to metallic contact zones and a region formed by diffusion in depth from the front face in contact with the layer. The first Zener diode (Z1) is formed in the same part of substrate as one of the transistors (Q1). The second Zener diode (Z2) is formed in a part of substrate which is distinct from the part where the second transistor (Q2) is formed, or in the same part of substrate as the second transistor (Q2). The complementary transistors (Q1, Q2) are of bipolar type, or the MOS type.

公开(公告)号：FR2797113A1

公开(公告)日：2001-02-02

申请号：FR9909986

申请日：1999-07-28

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  LADIRAY OLIVIER ,  SIMONNET JEAN MICHEL

IPC: H02M1/08 ,  H03K17/13 ,  H01L27/06

Abstract: The circuit for the zero voltage control of a bidirectional switch (TR) comprises a pair of complementary transistors (Q1, Q2) connected in parallel between the gate (G) and the reference terminal (A1) of bidirectional switch, where the gate of bidirectional switch is connected to a control signal source via a resistor (R2), and the control electrodes of transistors are connected to the second terminal (A2) of bidirectional switch via a high-value resistor (R1), a pair of Zener diodes (Z1, Z2) connected between the second resistor (R1) and each control electrode of transistors according to polarity so to turn the transistors on when the Zener threshold is passed. The control circuit is implemented in the same semiconductor substrate as the bidirectional switch (TR). In the first embodiment, the control electrodes of transistors are interconnected, and the Zener diodes (Z1, Z2) are connected in series and in opposition between the second resistor (R1) and the point of interconnection of control electrodes. In the second embodiment, the control electrodes of transistors are separated, and the Zener diodes are connected in opposition between the second resistor (R1) and each electrode. The second resistor (R1) is implemented in the same part of substrate, which is of first conductivity type, as the bidirectional switch (TR). The Zener diodes (Z1, Z2) are implemented on the side of front face of the substrate in a layer of second conductivity type, and comprise two regions of first conductivity type joined to metallic contact zones and a region formed by diffusion in depth from the front face in contact with the layer. The first Zener diode (Z1) is formed in the same part of substrate as one of the transistors (Q1). The second Zener diode (Z2) is formed in a part of substrate which is distinct from the part where the second transistor (Q2) is formed, or in the same part of substrate as the second transistor (Q2). The complementary transistors (Q1, Q2) are of bipolar type, or the MOS type.

公开(公告)号：FR2797525A1

公开(公告)日：2001-02-16

申请号：FR9910413

申请日：1999-08-09

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  SIMONNET JEAN MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/747

Abstract: A monolithic bidirectional switch formed in a semiconductor substrate of a first conductivity type having a front surface and a rear surface, including a first main vertical thyristor, the rear surface layer of which is of the second conductivity type, a second main vertical thyristor, the rear surface layer of which is of the first conductivity type. A structure for triggering each of the first and second main thyristors is arranged to face regions mutually distant from the two main thyristors, the neighboring portions of which correspond to a region for which, for the first main thyristor, a short-circuit area between cathode and cathode gate is formed.

公开(公告)号：FR2797524A1

公开(公告)日：2001-02-16

申请号：FR9910412

申请日：1999-08-09

Applicant: ST MICROELECTRONICS SA

Inventor： DUCLOS FRANCK ,  SIMONNET JEAN MICHEL ,  LADIRAY OLIVIER

IPC: H01L29/747

Abstract: The bidirectional switch incorporating two thyristors and a transistor is formed in a semiconductor substrate (1) of n-type conductivity and comprises the first vertical thyristor (Th1) with a rear-face layer (2) of p-type conductivity, the second vertical thyristor (Th2) with a rear-face layer (6) of n-type conductivity, an auxiliary thyristor with the rear-face layer (2) common with that of the first thyristor, a peripheral region (7) of p-type conductivity connecting the rear-face layer of auxiliary thyristor to the thyristor situated on the other side of substrate, the first metallization (M1) on the rear face of substrate, and the second metallization (M2) connecting the front-face layers of the first and second thyristors. The supplementary region (10) has the function of an insulator layer between the rear face of auxiliary thyristor and the first metallization. The supplementary region (10) is of semiconductor material of n-type conductivity, or of silicon dioxide (SiO2). The thickness of supplementary region (10) is less than that of the rear-face region (6) of second thyristor, the latter is about 10-15 micrometer. The main current of auxiliary thyristor is diverted because of the presence of supplementary layer, as well as the base current of transistor, which is a part of auxiliary thyristor.