公开(公告)号：FR2851668A1

公开(公告)日：2004-08-27

申请号：FR0302230

申请日：2003-02-24

Applicant: ST MICROELECTRONICS SA

Inventor： ZAHRA CLAUDE ,  TEGLIA YANNICK

IPC: G01R31/317 ,  G06F21/74 ,  G06K19/07 ,  G06F11/26 ,  G06K19/073

Abstract: The device has a ROM (10) storing a preset value composed of data words. A non-volatile programmable memory (12) is controlled for storing the preset value. A comparator (16) indicates how many data words of the value stored in memory (12) are similar to the words stored in ROM. A control unit (18) inactivates an operation mode selection signal when the number of similar words is greater than a preset threshold. Independent claims are also included for the following: (a) an integrated circuit (b) a selection process for operation mode of an integrated circuit between a stand by mode and a slave mode.

公开(公告)号：FR2850464A1

公开(公告)日：2004-07-30

申请号：FR0300934

申请日：2003-01-28

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART SYLVIE ,  ZAHRA CLAUDE

IPC: G01R31/28 ,  G01R31/3185 ,  G01R31/3193

Abstract: A number of integrated circuit chips are connected in parallel with a testing equipment which issues a first test command CTRL1 (20). The tests are then made asynchronously PROCESS1 (21) and the integrated circuits wait WAIT CONTROL2 (22). After a time interval the testing equipment asks for a reply SEND CTRL2 (23) and there is a synchronous reply SEND ANSW (24). An Independent claim is also included for: A system which has pairs of contacts to connect integrated circuits in parallel with a testing equipment and integrated circuits able to respond to a synchronous operation command.

公开(公告)号：DE602004030295D1

公开(公告)日：2011-01-13

申请号：DE602004030295

申请日：2004-02-23

Applicant: ST MICROELECTRONICS SA

Inventor： ZAHRA CLAUDE ,  TEGLIA YANNICK

IPC: G01R31/317 ,  G06F21/74 ,  G06K19/07

公开(公告)号：DE602004000226T2

公开(公告)日：2006-07-06

申请号：DE602004000226

申请日：2004-01-27

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART SYLVIE ,  ZAHRA CLAUDE

IPC: G01R31/28 ,  G01R31/3193 ,  G01R31/3185

Abstract: A number of integrated circuit chips are connected in parallel with a testing equipment which issues a first test command CTRL1 (20). The tests are then made asynchronously PROCESS1 (21) and the integrated circuits wait WAIT CONTROL2 (22). After a time interval the testing equipment asks for a reply SEND CTRL2 (23) and there is a synchronous reply SEND ANSW (24). An independent claim is also included for: A system which has pairs of contacts to connect integrated circuits in parallel with a testing equipment and integrated circuits able to respond to a synchronous operation command.

公开(公告)号：DE602004000226D1

公开(公告)日：2006-01-19

申请号：DE602004000226

申请日：2004-01-27

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART SYLVIE ,  ZAHRA CLAUDE

IPC: G01R31/28 ,  G01R31/3185 ,  G01R31/3193

Abstract: A number of integrated circuit chips are connected in parallel with a testing equipment which issues a first test command CTRL1 (20). The tests are then made asynchronously PROCESS1 (21) and the integrated circuits wait WAIT CONTROL2 (22). After a time interval the testing equipment asks for a reply SEND CTRL2 (23) and there is a synchronous reply SEND ANSW (24). An independent claim is also included for: A system which has pairs of contacts to connect integrated circuits in parallel with a testing equipment and integrated circuits able to respond to a synchronous operation command.