公开(公告)号：DE69627318D1

公开(公告)日：2003-05-15

申请号：DE69627318

申请日：1996-08-22

Applicant: ST MICROELECTRONICS SRL

Inventor： ROLANDI PAOLO ,  CALLIGARIO CRISTIANO ,  MANSTRETTA ALESSANDRO ,  TORELLI GUIDO

IPC: G11C16/02 ,  G11C11/56 ,  G11C11/00

Abstract: In a storage device of the multi-level type, comprising a plurality of memory cells addressable through an address input (RADR,CADR), each cell being adapted for storing more than one binary information element in a MOS transistor which has a control gate, and a floating gate for storing electrons to modify the threshold voltage of the transistor, and comprising a circuit enabling a Direct Memory Access (DMA) mode for directly accessing the memory cells from outside the device, the memory cells are programmed in the direct memory access mode by controlling, from outside the device, the amount of charge stored into the floating gate of each transistor.

公开(公告)号：DE69627318T2

公开(公告)日：2004-02-12

申请号：DE69627318

申请日：1996-08-22

Applicant: ST MICROELECTRONICS SRL

Inventor： ROLANDI PAOLO ,  CALLIGARIO CRISTIANO ,  MANSTRETTA ALESSANDRO ,  TORELLI GUIDO

IPC: G11C16/02 ,  G11C11/56 ,  G11C11/00

Abstract: In a storage device of the multi-level type, comprising a plurality of memory cells addressable through an address input (RADR,CADR), each cell being adapted for storing more than one binary information element in a MOS transistor which has a control gate, and a floating gate for storing electrons to modify the threshold voltage of the transistor, and comprising a circuit enabling a Direct Memory Access (DMA) mode for directly accessing the memory cells from outside the device, the memory cells are programmed in the direct memory access mode by controlling, from outside the device, the amount of charge stored into the floating gate of each transistor.