1.
    发明专利
    未知

    公开(公告)号:DE602006013444D1

    公开(公告)日:2010-05-20

    申请号:DE602006013444

    申请日:2006-07-11

    Abstract: A system for detecting during write/read operations the status of a FIFO memory (10) having N memory locations includes a first (202) and a second (402) Gray-code counter each configured to take values out of 2*N possible values. The first (202) and second (402) Gray-code counters are configured to be initialized to a value J, and incremented on each write operation and each said read operation. The first (202) and second (402) Gray-code counters are configured to be set to the value 0 if their count values reach 2*N. A comparator block (210) monitors the distance of the value of the first counter (202) to the value of said second counter (402) and detects the full status of the FIFO memory (10) if that distance is equal to N. The comparator block (210) may similarly detect the empty status of the FIFO memory (10,30) if the distance in question is equal to 0.

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