公开(公告)号：DE69705478D1

公开(公告)日：2001-08-09

申请号：DE69705478

申请日：1997-10-08

Applicant: ST MICROELECTRONICS SRL

Inventor： OLIVIERI MASSIMILIANO ,  FABBRIZIO VITO ,  GUERRIERI ROBERTO ,  KRAMER ALAN

IPC: G06T1/00 ,  G05D1/02 ,  G06T7/60 ,  G05B1/03 ,  G05D1/03

Abstract: Method (10), in a system for aiding the guidance of a vehicle, for identifying marking stripes of road lanes comprising the phases of subjecting a road image to a convolution operation (14) with a mask matrix so as to identify discontinuities present in the image, comparing the result with a threshold value (16) and determining (18) a representation of the marking stripes, in which the mask matrix is set in such a way as to eliminate at least partially the discontinuities which do not correspond to the marking stripes.

公开(公告)号：DE69518326T2

公开(公告)日：2001-01-18

申请号：DE69518326

申请日：1995-10-13

Applicant: ST MICROELECTRONICS SRL

Inventor： FABBRIZIO VITO ,  COLLI GIANLUCA ,  KRAMER ALAN

IPC: G06G7/60 ,  G06F15/18 ,  G06N3/06 ,  G06N3/063 ,  G06F15/80

Abstract: A neural network (1) including a number of synaptic weighting elements (15, 17), and a neuron stage (5); each of the synaptic weighting elements (15, 17) having a respective synaptic input connection (11, 13) supplied with a respective input signal (x1, ..., xn); and the neuron stage (5) having inputs (36, 37) connected to the synaptic weighting elements, and being connected to an output (39) of the neural network (1) supplying a digital output signal (O). The synaptic weighting elements (15, 17) are formed by memory cells programmable to different threshold voltage levels, so that each presents a respective programmable conductance; and the neuron stage (5) provides for measuring conductance (33-35, 43-45) on the basis of the current through the memory cells, and for generating a binary output signal on the basis of the total conductance of the synaptic elements.

公开(公告)号：DE69518326D1

公开(公告)日：2000-09-14

申请号：DE69518326

申请日：1995-10-13

Applicant: ST MICROELECTRONICS SRL

Inventor： FABBRIZIO VITO ,  COLLI GIANLUCA ,  KRAMER ALAN

IPC: G06G7/60 ,  G06F15/18 ,  G06N3/06 ,  G06N3/063 ,  G06F15/80

Abstract: A neural network (1) including a number of synaptic weighting elements (15, 17), and a neuron stage (5); each of the synaptic weighting elements (15, 17) having a respective synaptic input connection (11, 13) supplied with a respective input signal (x1, ..., xn); and the neuron stage (5) having inputs (36, 37) connected to the synaptic weighting elements, and being connected to an output (39) of the neural network (1) supplying a digital output signal (O). The synaptic weighting elements (15, 17) are formed by memory cells programmable to different threshold voltage levels, so that each presents a respective programmable conductance; and the neuron stage (5) provides for measuring conductance (33-35, 43-45) on the basis of the current through the memory cells, and for generating a binary output signal on the basis of the total conductance of the synaptic elements.

公开(公告)号：DE69607166D1

公开(公告)日：2000-04-20

申请号：DE69607166

申请日：1996-10-15

Applicant: ST MICROELECTRONICS SRL

Inventor： FABBRIZIO VITO ,  KRAMER ALAN

IPC: G06F17/10 ,  G06N3/063 ,  G06F15/80

Abstract: An electronic device (100) for performing convolution operations comprises shift registers (106-120) for receiving binary input values (122-129) representative of an original matrix, synapses (142) for storing weights correlated with a mask matrix, and neurones (154, 156) for outputting (166, 168) a binary result dependent on the sum of the binary values weighted by the synapses (142), each synapse (142) having a conductance correlated with the weight stored and dependent upon the binary input value and each neurone (154, 156) generating the binary result in dependence on the total conductance of the corresponding synapses (142).

公开(公告)号：DE69607166T2

公开(公告)日：2000-12-14

申请号：DE69607166

申请日：1996-10-15

Applicant: ST MICROELECTRONICS SRL

Inventor： FABBRIZIO VITO ,  KRAMER ALAN

IPC: G06F17/10 ,  G06N3/063 ,  G06F15/80

Abstract: An electronic device (100) for performing convolution operations comprises shift registers (106-120) for receiving binary input values (122-129) representative of an original matrix, synapses (142) for storing weights correlated with a mask matrix, and neurones (154, 156) for outputting (166, 168) a binary result dependent on the sum of the binary values weighted by the synapses (142), each synapse (142) having a conductance correlated with the weight stored and dependent upon the binary input value and each neurone (154, 156) generating the binary result in dependence on the total conductance of the corresponding synapses (142).