1.
    发明专利
    未知

    公开(公告)号:DE69920399D1

    公开(公告)日:2004-10-28

    申请号:DE69920399

    申请日:1999-02-18

    Abstract: A counter for monitoring the state of charge of the battery of an electronic apparatus comprising a current sensing circuit composed of a differential amplifier (AMP), a resettable integrator (INTEGR), a first comparator (CompH) and a second comparator (CompL) generating a logic charge interrupt signal (INCR), and a logic discharge interrupt signal (DECR), respectively, a switch (SW) for discharging the capacitance of integration (C) controlled by a logic circuit (LOGIC) at every transition of the output signal of one or the other of said first and second comparators (CompH,CompL), and processing means (N) which monitor the state of charge of the battery, further comprising a timer (TIMER) measuring the time elapsing from the start of a new integration ramp and the switching instant of either one of said first and second comparators (CompH,CompL) and a nonvolatile memory register (REGISTER) containing the measure of the time interval of integration of the offset of said differential amplifier (AMP) up to the switching of either of said first and second comparators (CompH,CompL), performed during a trimming step. The processing means (N) increments or decrements the computation of said interrupt signals (INCR,DECR) depending on the sign of the offset.

Patent Agency Ranking