公开(公告)号：ITMI20021540A1

公开(公告)日：2004-01-12

申请号：ITMI20021540

申请日：2002-07-12

Applicant: ST MICROELECTRONICS SRL

Inventor： BELLOMO IGNAZIO ,  MARIANI ADALBERTO

IPC: H02M3/158

Abstract: A multiphase buck type voltage regulator having at least two phases and including a first switching means that selectively connect a supply voltage to a load through a first current path; a second switching means that selectively connect said supply voltage to said load through a second current path; a first activation circuit that activates said first switching means; a first delay circuit that deactivates said first switching means after a first period of time; a second activation circuit that activates said second switching means; a second delay circuit that after a second period of time deactivates said second switching means; said first period of time depends on said supply voltage and on the output voltage; said second period of time depends on said supply voltage and on a voltage proportional to the difference of current that flows in said first and second current path.

公开(公告)号：ITVA20020038A1

公开(公告)日：2003-12-01

申请号：ITVA20020038

申请日：2002-05-30

Applicant: ST MICROELECTRONICS SRL

Inventor： CORVA GIULIO ,  MARIANI ADALBERTO

IPC: H02M3/156 ,  H02M3/158

Abstract: A circuit device generates a signal proportional to the current circulating in an inductor and a current comparator, which is disabled by a stand-by signal, and is input with a feedback signal and with a signal proportional to the current circulating in the inductor and generates a logic comparison signal. A control logic, input with a logic comparison signal and the stand-by signal, drives the switch or the switches of a power stage. A clamp, connected in parallel to a capacitive branch, makes the feedback signal greater than a certain minimum threshold, to make the current that is delivered to the load, when the regulator is not in the stand-by state, greater than a certain minimum current.

公开(公告)号：DE69920399D1

公开(公告)日：2004-10-28

申请号：DE69920399

申请日：1999-02-18

Applicant: ST MICROELECTRONICS SRL

Inventor： CASTELLI CLAUDIA ,  FRATERNALI FABRIZIO ,  MARIANI ADALBERTO ,  POJER ALEX

IPC: H02J7/00 ,  G01R31/36 ,  H01M10/48

Abstract: A counter for monitoring the state of charge of the battery of an electronic apparatus comprising a current sensing circuit composed of a differential amplifier (AMP), a resettable integrator (INTEGR), a first comparator (CompH) and a second comparator (CompL) generating a logic charge interrupt signal (INCR), and a logic discharge interrupt signal (DECR), respectively, a switch (SW) for discharging the capacitance of integration (C) controlled by a logic circuit (LOGIC) at every transition of the output signal of one or the other of said first and second comparators (CompH,CompL), and processing means (N) which monitor the state of charge of the battery, further comprising a timer (TIMER) measuring the time elapsing from the start of a new integration ramp and the switching instant of either one of said first and second comparators (CompH,CompL) and a nonvolatile memory register (REGISTER) containing the measure of the time interval of integration of the offset of said differential amplifier (AMP) up to the switching of either of said first and second comparators (CompH,CompL), performed during a trimming step. The processing means (N) increments or decrements the computation of said interrupt signals (INCR,DECR) depending on the sign of the offset.

公开(公告)号：IT202000006871A1

公开(公告)日：2021-10-01

申请号：IT202000006871

申请日：2020-04-01

Applicant: ST MICROELECTRONICS SRL

Inventor： MARIANI ADALBERTO

IPC: H01L20060101