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公开(公告)号:ITMI20002042D0
公开(公告)日:2000-09-19
申请号:ITMI20002042
申请日:2000-09-19
Applicant: ST MICROELECTRONICS SRL
Inventor: ZAFARANA ALESSANDRO , CASTELLI CLAUDIA
IPC: H02M3/158
Abstract: A voltage/current controller device, particularly for interleaving switching regulators, comprises: a DC/DC converter having a plurality of modules, with each module including a drive transistor pair connected in series between first and second supply voltage references, a current sensor connected to one transistor in the pair, and a current read circuit connected to the sensor. Advantageously, the read circuit comprises a transconductance amplifier connected across the current sensor to sense a voltage signal related to a load current being applied to each module, the transconductance amplifier reading the voltage signal with the transistor in the conducting state.
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公开(公告)号:ITMI20002233A1
公开(公告)日:2002-04-16
申请号:ITMI20002233
申请日:2000-10-16
Applicant: ST MICROELECTRONICS SRL
Inventor: ZAFARANA ALESSANDRO , CASTELLI CLAUDIA
IPC: G06F1/26
Abstract: A managing system manages a plurality of VRMs associated with a plurality of microprocessors and connected in parallel together between first and second voltage references, the VRMs having output terminals connected together and arranged to communicate over a common bus. The managing system includes an error amplifier being input an output voltage signal from the VRM plurality, a reference voltage, and a droop voltage produced through an equivalent droop resistor receiving an output current signal from the VRM plurality and being connected to the common bus. The error amplifier effects a comparison of the input signals to generate a control voltage signal to the VRM plurality. Advantageously, the managing system comprises a controller connected to the equivalent droop resistor.
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公开(公告)号:ITMI20002042A1
公开(公告)日:2002-03-19
申请号:ITMI20002042
申请日:2000-09-19
Applicant: ST MICROELECTRONICS SRL
Inventor: ZAFARANA ALESSANDRO , CASTELLI CLAUDIA
IPC: H02M3/158
Abstract: A voltage/current controller device, particularly for interleaving switching regulators, comprises: a DC/DC converter having a plurality of modules, with each module including a drive transistor pair connected in series between first and second supply voltage references, a current sensor connected to one transistor in the pair, and a current read circuit connected to the sensor. Advantageously, the read circuit comprises a transconductance amplifier connected across the current sensor to sense a voltage signal related to a load current being applied to each module, the transconductance amplifier reading the voltage signal with the transistor in the conducting state.
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公开(公告)号:ITMI20131998A1
公开(公告)日:2015-05-30
申请号:ITMI20131998
申请日:2013-11-29
Applicant: ST MICROELECTRONICS SRL
Inventor: ADRAGNA CLAUDIO , CASTELLI CLAUDIA
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公开(公告)号:DE69920399D1
公开(公告)日:2004-10-28
申请号:DE69920399
申请日:1999-02-18
Applicant: ST MICROELECTRONICS SRL
Inventor: CASTELLI CLAUDIA , FRATERNALI FABRIZIO , MARIANI ADALBERTO , POJER ALEX
Abstract: A counter for monitoring the state of charge of the battery of an electronic apparatus comprising a current sensing circuit composed of a differential amplifier (AMP), a resettable integrator (INTEGR), a first comparator (CompH) and a second comparator (CompL) generating a logic charge interrupt signal (INCR), and a logic discharge interrupt signal (DECR), respectively, a switch (SW) for discharging the capacitance of integration (C) controlled by a logic circuit (LOGIC) at every transition of the output signal of one or the other of said first and second comparators (CompH,CompL), and processing means (N) which monitor the state of charge of the battery, further comprising a timer (TIMER) measuring the time elapsing from the start of a new integration ramp and the switching instant of either one of said first and second comparators (CompH,CompL) and a nonvolatile memory register (REGISTER) containing the measure of the time interval of integration of the offset of said differential amplifier (AMP) up to the switching of either of said first and second comparators (CompH,CompL), performed during a trimming step. The processing means (N) increments or decrements the computation of said interrupt signals (INCR,DECR) depending on the sign of the offset.
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公开(公告)号:IT1319007B1
公开(公告)日:2003-09-19
申请号:ITMI20002233
申请日:2000-10-16
Applicant: ST MICROELECTRONICS SRL
Inventor: CASTELLI CLAUDIA , ZAFARANA ALESSANDRO
IPC: G06F1/26
Abstract: A managing system manages a plurality of VRMs associated with a plurality of microprocessors and connected in parallel together between first and second voltage references, the VRMs having output terminals connected together and arranged to communicate over a common bus. The managing system includes an error amplifier being input an output voltage signal from the VRM plurality, a reference voltage, and a droop voltage produced through an equivalent droop resistor receiving an output current signal from the VRM plurality and being connected to the common bus. The error amplifier effects a comparison of the input signals to generate a control voltage signal to the VRM plurality. Advantageously, the managing system comprises a controller connected to the equivalent droop resistor.
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公开(公告)号:IT1318879B1
公开(公告)日:2003-09-10
申请号:ITMI20002042
申请日:2000-09-19
Applicant: ST MICROELECTRONICS SRL
Inventor: ZAFARANA ALESSANDRO , CASTELLI CLAUDIA
IPC: H02M3/158
Abstract: A voltage/current controller device, particularly for interleaving switching regulators, comprises: a DC/DC converter having a plurality of modules, with each module including a drive transistor pair connected in series between first and second supply voltage references, a current sensor connected to one transistor in the pair, and a current read circuit connected to the sensor. Advantageously, the read circuit comprises a transconductance amplifier connected across the current sensor to sense a voltage signal related to a load current being applied to each module, the transconductance amplifier reading the voltage signal with the transistor in the conducting state.
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