公开(公告)号：JP2000057787A

公开(公告)日：2000-02-25

申请号：JP6496099

申请日：1999-03-11

Applicant: ST MICROELECTRONICS SRL

Inventor： MALOBERTI FRANCO ,  ONETO ANDREA ,  TORELLI GUIDO

IPC: G11C16/06 ,  G11C11/56 ,  G11C16/02 ,  G11C16/26

Abstract: PROBLEM TO BE SOLVED: To accurately perform programming by setting the component of a logic value to a value that correlates to the value of physical amount corresponding to the state of a memory cell, and by repeating a cycle until the logic value is completely determined. SOLUTION: The current supply capability of the transistor of a selected cell C12 is proportional to the difference between voltage on the gate terminal and the threshold voltage. Therefore, a current Icell being supplied by a selected cell C12 corresponds to a logic value being stored at the current Icell. The cell current Icell is supplied to the first input terminal of a comparison circuit SENS: 130, and another input terminal of the comparison circuit 130 receives various reference currents being generated by an appropriate circuit REF: 140. The circuit 130 is connected to an adjustment circuit COND: 120, compares the cell current Icell with a reference current Ir, generates a logic value LVcell at the output terminal, and corresponds to a data element being stored into a selected cell.

公开(公告)号：DE69827601D1

公开(公告)日：2004-12-23

申请号：DE69827601

申请日：1998-03-27

Applicant: ST MICROELECTRONICS SRL

Inventor： MALOBERTI FRANCO ,  ONETO ANDREA ,  TORELLI GUIDO

IPC: G11C16/06 ,  G11C11/56 ,  G11C16/02 ,  G11C16/26 ,  G11C11/00

Abstract: Method (200) for reading a multiple-level memory cell (C12) capable of taking on three or more states which are represented by different values of a physical quantity (Icell) and each of which is associated with a corresponding logical value (LVcell), comprising the steps of setting (210) an actual physical quantity (Is1) to a value correlated with the value of the physical quantity (Icell) corresponding to the state of the memory cell (C12), and repeating (235), up to the complete determination of the logical value (LVcell) corresponding to the state of the memory cell (C12), a cycle (215-235) comprising the steps of setting (227, 232) a component of the logical value (Di) to a value which is a function of a range in which the actual physical quantity (Isi) lies, determined by comparing (215, 220) the actual physical quantity (Isi) with at least one reference physical quantity (Iri) having a predetermined value lying between a minimum value and a maximum value for the actual physical quantity (Isi), and setting (237) the actual physical quantity for a possible next cycle (Is(i+1)) to a relative value of the actual physical quantity (Isi) with respect to the range in which it lies.