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29 records (took 0.022 seconds)

    1.
    发明专利
    未知

    公开(公告)号：IT1321089B1

    公开(公告)日：2003-12-30

    申请号：ITTO20001100

    申请日：2000-11-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PATTI DAVIDE

    IPC: H01L21/02 ,  H01L27/08 ,  H01L29/8605

    Abstract: A structure for a semiconductor resistive element, applicable in particular to power components, having a high concentration substrate of the n type, a first epitaxial layer of the n type, a region of the p type arranged on said first epitaxial layer so to form the resistive element proper, a second epitaxial layer of n type grown on said first epitaxial layer to make the region of the p type a buried region, and an additional layer of the n type with a higher concentration with respect to the second epitaxial level, positioned on the embedded region. Low resistivity regions of the p type adapted to make low resistivity deep contacts for the resistor are provided. The buried region can be made either with a development that is substantially uniform in its main direction of extension or so to present, at on part of its length, a structure of adjacent subregions in marginal continuity. In this way, either a resistive element presenting a substantially linear performance in all ranges of applied voltage or a resistive element presenting a marked increase of the resistance value as the applied voltage increases can be made. This all with the additional possibility of selectively varying the resistance value demonstrated before the increase.

    2.
    发明专利
    未知

    公开(公告)号：IT1320016B1

    公开(公告)日：2003-11-12

    申请号：ITTO20000319

    申请日：2000-04-04

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PATTI DAVIDE ,  RONSISVALLE CESARE

    IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78

    Abstract: A process for manufacturing deep well junction structures that includes in succession, the steps of: on a first substrate having a first conductivity type and a first doping level, growing an epitaxial layer having the first conductivity type and a second doping level lower than the first doping level; anisotropically etching the epitaxial layer using a mask to form trenches; forming deep conductive regions surrounding the trenches and having a second conductivity type, opposite to the first conductivity type and the second doping level; and filling the trenches. The deep conductive regions are formed by angular ionic implantation and subsequent diffusion of a doping ion species within the epitaxial layer.

    3.
    发明专利
    未知

    公开(公告)号：ITMI20000688A1

    公开(公告)日：2001-10-01

    申请号：ITMI20000688

    申请日：2000-03-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PATTI DAVIDE

    IPC: H01L27/07

    Abstract: An electronic device, integrated monolithically in a semiconductor substrate and comprising a bipolar transistor connected in series to at least one MOS transistor, the bipolar transistor having a base region that includes a first buried region and a first diffused region extending continuously from the substrate surface down to the buried region, and the diffused region is bordered by an isolation trench region extending in the buried region.

    5.
    发明专利
    未知

    公开(公告)号：ITMI20000688D0

    公开(公告)日：2000-03-31

    申请号：ITMI20000688

    申请日：2000-03-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PATTI DAVIDE

    IPC: H01L27/07

    Abstract: An electronic device, integrated monolithically in a semiconductor substrate and comprising a bipolar transistor connected in series to at least one MOS transistor, the bipolar transistor having a base region that includes a first buried region and a first diffused region extending continuously from the substrate surface down to the buried region, and the diffused region is bordered by an isolation trench region extending in the buried region.

    8.
    发明专利
    未知

    公开(公告)号：ITTO20000319D0

    公开(公告)日：2000-04-04

    申请号：ITTO20000319

    申请日：2000-04-04

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PATTI DAVIDE ,  RONSISVALLE CESARE

    IPC: H01L21/265 ,  H01L21/336 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78

    Abstract: A process for manufacturing deep well junction structures that includes in succession, the steps of: on a first substrate having a first conductivity type and a first doping level, growing an epitaxial layer having the first conductivity type and a second doping level lower than the first doping level; anisotropically etching the epitaxial layer using a mask to form trenches; forming deep conductive regions surrounding the trenches and having a second conductivity type, opposite to the first conductivity type and the second doping level; and filling the trenches. The deep conductive regions are formed by angular ionic implantation and subsequent diffusion of a doping ion species within the epitaxial layer.

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