公开(公告)号：DE69431598D1

公开(公告)日：2002-11-28

申请号：DE69431598

申请日：1994-11-30

Applicant: ST MICROELECTRONICS SRL

Inventor： PIO FREDERICO ,  VAJANA BRUNO ,  PARUZZI PAOLA

IPC: G11C17/00 ,  G05F3/24 ,  G11C5/14 ,  G11C11/56 ,  G11C16/06

Abstract: The present invention relates to a monolithically integrable predetermined voltage generator (1) comprising a node (IN) held at a constant voltage (Vpp) and a plurality of circuit branches (2a, 2b, 2c and 2d) each of which incorporates at least one turn on control terminal (3a, 3b, 3c and 3d) and which are interconnected in such a manner that at least one of them leads to said node (IN). Across each of the branches (2a, 2b, 2c and 2d) a corresponding voltage drop is present when the branch is turned on and obtained from a certain number of active elements included in the branch. In accordance with a preferred embodiment, diode-connected MOS transistors are used as active elements. The generator also comprises an output terminal (OUT) associated with at least one of said branches at which is generated a predetermined voltage value. A control signal is applied to at least one turn on control terminal (3a, 3b, 3c and 3d) of said plurality of branches for turning on a predetermined subset of said plurality of branches and generating at the output terminal (OUT) a voltage lower than that at said node (IN). Each of the predetermined voltage values is a predetermined combination of the voltage drops on the turned on branches. In a preferred application, the generator of the present invention is used in a multilevel EEPROM memory circuit for generating a plurality of programming voltages for the memory cells.