公开(公告)号：JPH07218578A

公开(公告)日：1995-08-18

申请号：JP2865295

申请日：1995-01-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PENZA LUIGI ,  FAVALLI MICHELE ,  RICCO BRUNO

IPC: G01R31/26 ,  G01R31/28 ,  G01R31/30 ,  G01R31/317 ,  H01L21/66

Abstract: PURPOSE: To evaluate the existence of resistant bridging defect by sensing that voltages existing in one or more signal nodes stay within a predetermined intermediate voltage range. CONSTITUTION: An AUX-LINE is connected to one of two supply lines VDD of a functional CMOS or BiCMOS cell of an integrated circuit, or an earth via a load. Respective inverter stages which are input from the output node of a logic cell to be traced are connected to the AUX-LINE and the other of the two lines VDD, and are made of (n) channel and (r) channel transistors. When the voltage of the output node of the logic cell has middle level within a predetermined intermediate voltage range, the respective inverter stages cause the AUX-LINE and the other line VDD to be conductive mutually so that the voltage of the output node can be traced. By matching the trigger levels of the respective inverter stages with the logic threshold level of the logic cell, the accurate selection test of the logic cell can be executed.

公开(公告)号：JPH11191296A

公开(公告)日：1999-07-13

申请号：JP28774398

申请日：1998-10-09

Applicant: ST MICROELECTRONICS SRL

Inventor： CAPPELLETTI PAOLO ,  RICCO BRUNO ,  ESSENI DAVID

IPC: G11C16/02 ,  G11C11/56 ,  G11C16/10 ,  G11C16/12

Abstract: PROBLEM TO BE SOLVED: To eliminate the need for an additional current limiting circuit by successively controlling programming parameters by writing into cells in an equilibrium between an injection current and a displacement current and forming a best programming of the cells. SOLUTION: To optimize writing into cells, it is made in an equilibirium in which cells have a constant floating gate voltage and current. Especially, to both writing of programming and that of a software after erasure, substrate area of the cells is biased to a negative voltage against a source area, and further, a control gate area of the cells applied with a ramp voltage. The gradient of this ramp voltage is selected so that an equilibirium can be achieved between an injection current made to flow into the floating gate area and a displacement current related to an equivalent capacity existing between the floating gate and the control gate area.

公开(公告)号：DE69521137T2

公开(公告)日：2001-10-11

申请号：DE69521137

申请日：1995-12-29

Applicant: ST MICROELECTRONICS SRL

Inventor： RICCO BRUNO ,  LANZONI MASSIMO

IPC: H03F1/30 ,  H03F3/45

公开(公告)号：DE69323484D1

公开(公告)日：1999-03-25

申请号：DE69323484

申请日：1993-04-22

Applicant: ST MICROELECTRONICS SRL

Inventor： RICCO BRUNO ,  LANZONI MASSIMO ,  BRIOZZO LUCIANO

IPC: G11C17/00 ,  G11C16/04 ,  G11C16/12 ,  G11C16/14 ,  G11C16/34 ,  G11C16/06

Abstract: The present programming method exploits the close dependence of tunneling current on the voltage drop (Vox) across the tunnel oxide layer, for which purpose, a bootstrapped capacitor (3) connected to the drain terminal (D) of the transistor (1) is employed, the charge state of which determines the bias of the tunnel oxide and is in turn determined by the charge state in the floating gate (FG). Biasing by the bootstrapped capacitor is such as to permit passage of the tunneling current (ITUN) and, hence, a change in the threshold voltage of the transistor until the floating gate reaches the desired charge level, and to prevent passage of the tunneling current upon the transistor reaching the desired threshold. Programming is thus performed automatically and to a predetermined degree of accuracy, with no need for a special circuit for arresting the programming operation when the desired threshold is reached.

公开(公告)号：DE69521137D1

公开(公告)日：2001-07-05

申请号：DE69521137

申请日：1995-12-29

Applicant: ST MICROELECTRONICS SRL

Inventor： RICCO BRUNO ,  LANZONI MASSIMO

IPC: H03F1/30 ,  H03F3/45

公开(公告)号：DE69323484T2

公开(公告)日：1999-08-26

申请号：DE69323484

申请日：1993-04-22

Applicant: ST MICROELECTRONICS SRL

Inventor： RICCO BRUNO ,  LANZONI MASSIMO ,  BRIOZZO LUCIANO

IPC: G11C17/00 ,  G11C16/04 ,  G11C16/12 ,  G11C16/14 ,  G11C16/34 ,  G11C16/06

Abstract: The present programming method exploits the close dependence of tunneling current on the voltage drop (Vox) across the tunnel oxide layer, for which purpose, a bootstrapped capacitor (3) connected to the drain terminal (D) of the transistor (1) is employed, the charge state of which determines the bias of the tunnel oxide and is in turn determined by the charge state in the floating gate (FG). Biasing by the bootstrapped capacitor is such as to permit passage of the tunneling current (ITUN) and, hence, a change in the threshold voltage of the transistor until the floating gate reaches the desired charge level, and to prevent passage of the tunneling current upon the transistor reaching the desired threshold. Programming is thus performed automatically and to a predetermined degree of accuracy, with no need for a special circuit for arresting the programming operation when the desired threshold is reached.