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公开(公告)号：DE69525535T2
公开(公告)日：2002-11-28
申请号：DE69525535
申请日：1995-11-21
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI ALFREDO , COLLI GIANLUCA , CHIOFFI ERNESTINA , GERNA DANILO
Abstract: An efficient adaptivity to varying conditions of luminance is embodied in an optical sensor composed of an array of photosensitive cells each including a photosensitive structure, a storage capacitance, a first switch (CKSTORE) for storing the photogenerated charge in the capacitance, and a second switch (CKREAD) for selecting the capacitance when reading the charge stored therein, by detecting the level of the global current photogenerated by the totality of the photosensitive elements, during an initial phase of each frame capture, storage and reading cycle, and by subsequently controlling the closing interval of said first switch (CKSTORE) of the cells in function of the detected level of the global photogenerated current. The implementing control circuit may be realized in various forms.
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公开(公告)号：DE69525535D1
公开(公告)日：2002-03-28
申请号：DE69525535
申请日：1995-11-21
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI ALFREDO , COLLI GIANLUCA , CHIOFFI ERNESTINA , GERNA DANILO
Abstract: An efficient adaptivity to varying conditions of luminance is embodied in an optical sensor composed of an array of photosensitive cells each including a photosensitive structure, a storage capacitance, a first switch (CKSTORE) for storing the photogenerated charge in the capacitance, and a second switch (CKREAD) for selecting the capacitance when reading the charge stored therein, by detecting the level of the global current photogenerated by the totality of the photosensitive elements, during an initial phase of each frame capture, storage and reading cycle, and by subsequently controlling the closing interval of said first switch (CKSTORE) of the cells in function of the detected level of the global photogenerated current. The implementing control circuit may be realized in various forms.
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公开(公告)号：DE69507033T2
公开(公告)日：1999-05-12
申请号：DE69507033
申请日：1995-10-09
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI ALFREDO , COLLI GIANLUCA , CHIOFFI ERNESTINA
Abstract: The absorption of current from the supply rails by a current comparator circuit producing a logic configuration of two complementary nodes of a first branch and of a second branch, respectively, in function of the comparison between a first current forced through the first branch and a second current forced through the second branch is limited by discriminating the lowest between the two compared currents and by mirroring the discriminated lowest current on the circuit branch through which the highest current is being forced. The comparator circuit comprises means that are responsive to the logic configuration of the two complementary nodes of the comparator circuit so as to assume a state capable of configuring the circuit to function as a current mirror that forces the lowest current on the other branch of the current comparator circuit.
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公开(公告)号：DE69507033D1
公开(公告)日：1999-02-11
申请号：DE69507033
申请日：1995-10-09
Applicant: ST MICROELECTRONICS SRL
Inventor： TOMASINI ALFREDO , COLLI GIANLUCA , CHIOFFI ERNESTINA
Abstract: The absorption of current from the supply rails by a current comparator circuit producing a logic configuration of two complementary nodes of a first branch and of a second branch, respectively, in function of the comparison between a first current forced through the first branch and a second current forced through the second branch is limited by discriminating the lowest between the two compared currents and by mirroring the discriminated lowest current on the circuit branch through which the highest current is being forced. The comparator circuit comprises means that are responsive to the logic configuration of the two complementary nodes of the comparator circuit so as to assume a state capable of configuring the circuit to function as a current mirror that forces the lowest current on the other branch of the current comparator circuit.
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