Reduced power load/store queue searching mechanism
    1.
    发明公开
    Reduced power load/store queue searching mechanism 有权
    Lade- / Speicherwarteschlangensuch机制有限公司Energieverbrauch

    公开(公告)号:EP2202637A1

    公开(公告)日:2010-06-30

    申请号:EP09180317.1

    申请日:2009-12-22

    CPC classification number: G06F9/3834 G06F9/3824 G06F9/3855

    Abstract: A comparison circuit can reduce the amount of power consumed when searching a load queue or a store queue of a microprocessor. Some embodiments of the comparison circuit use a comparison unit that performs an initial comparison of addresses using a subset of the address bits. If the initial comparison results In a match, a second comparison unit can be enabled to compare another subset of the address bits.

    Abstract translation: 比较电路可以减少在搜索微处理器的加载队列或存储队列时消耗的功率量。 比较电路的一些实施例使用比较单元,其使用地址位的子集来执行地址的初始比较。 如果初始比较结果在匹配中,可以使第二比较单元能够比较另一个地址位的子集。

    Reducing instruction collisions in a processor
    3.
    发明公开
    Reducing instruction collisions in a processor 有权
    einem Prozessor的Verringerung der Befehlskollisionen

    公开(公告)号:EP2207089A1

    公开(公告)日:2010-07-14

    申请号:EP09180314.8

    申请日:2009-12-22

    CPC classification number: G06F9/3836 G06F9/3855

    Abstract: An embodiment of a technique for selecting instructions for execution from an issue queue at multiple function units while reducing the chances of instruction collisions. Each function unit in a processor may include a selection logic circuit that selects a specific instruction from the issue queue for execution. In order to avoid instruction collision, a function unit may have a selection logic circuit that may select two instructions from an instruction queue: one according to a first selection technique and one according to a second selection technique. Then, by comparing the instruction selected by the first selection technique to the instruction selected by the selection logic circuit of another function unit, the instruction selected by the second technique may be used instead if there will be an instruction collision because the instruction selected by the first selection technique is the same as the instruction selected at a different function unit.

    Abstract translation: 用于在减少指令冲突的机会的同时从多个功能单元的发布队列中选择用于执行的指令的技术的实施例。 处理器中的每个功能单元可以包括从发布队列中选择特定指令以执行的选择逻辑电路。 为了避免指令冲突,功能单元可以具有可以从指令队列中选择两个指令的选择逻辑电路:一个根据第一选择技术和根据第二选择技术的指令。 然后,通过将由第一选择技术选择的指令与由另一功能单元的选择逻辑电路选择的指令进行比较,可以使用由第二技术选择的指令来代替,否则将产生指令冲突,因为由 第一选择技术与在不同功能单元处选择的指令相同。

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