Via-less thin film resistor with a dielectric cap and manufacturing method thereof
    3.
    发明公开
    Via-less thin film resistor with a dielectric cap and manufacturing method thereof 审中-公开
    而不接触孔薄膜电阻器与它们的电介质层及其制造方法

    公开(公告)号:EP2423950A2

    公开(公告)日:2012-02-29

    申请号:EP11178597.8

    申请日:2011-08-24

    Abstract: The present disclosure is directed to a thin film resistor structure (100) that includes a resistive element (102) electrically connecting first conductor layers (106a,b) of adjacent interconnect structures (104a,b). The resistive element is covered by a dielectric cap layer (105) that acts as a stabilizer and heat sink for the resistive element. Each interconnect includes a second conductor layer (124) over the first conductive layer. The thin film resistor includes a chromium silicon resistive element covered by a silicon nitride cap layer.

    Abstract translation: 本发明涉及的薄膜电阻器结构(100)包括一电阻性元件那样(102),其电连接第一导体层(106A,B)相邻的互连结构(104A,B)。 所述电阻元件由介电覆盖层覆盖(105)确实用作稳定剂和散热器为电阻元件。 每个互连件包括在所述第一导电层的第二导体层(124)。 薄膜电阻器包括由硅氮化物帽层覆盖的硅铬电阻元件。

    Lateral connection for a via-less thin film resistor and method of forming the same
    5.
    发明公开
    Lateral connection for a via-less thin film resistor and method of forming the same 审中-公开
    用于薄膜电阻横向连接,而通孔及其制造方法

    公开(公告)号:EP2423948A2

    公开(公告)日:2012-02-29

    申请号:EP11178590.3

    申请日:2011-08-24

    Abstract: The present disclosure is directed to an integrated circuit (100) having a substrate (108) and a first and a second interconnect structure (104a,b) over the substrate. Each interconnect structure has a first conductive layer (106) over the substrate and a second conductive layer (124) over the first conductive layer. The integrated circuit also includes a thin film resistor (102) over a portion of the substrate between the first and the second interconnect structure that electrically connects the first conductive layers of the first and second interconnect structures.

    Abstract translation: 本发明涉及在具有基板(108)和第一和第二互连结构(104A,b)在基板的集成电路(100)。 每一个互连结构具有超过基板和在所述第一导电层的第二导电层(124)的第一导电层(106)。 因此,该集成电路包括一个薄膜电阻器(102)在第一和没有导电连接第一和第二互连结构的第一层的第二互连结构之间的衬底的一部分。

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