公开(公告)号：EP3648275A1

公开(公告)日：2020-05-06

申请号：EP19205311.4

申请日：2019-10-25

Applicant: STMicroelectronics S.r.l.

Inventor： D'ANGELO, Vittorio ,  CANNAVACCIUOLO, Salvatore ,  LECCE, Sergio ,  BENDOTTI, Valerio ,  PENNISI, Orazio

IPC: H02H9/00 ,  H02H9/04

Abstract: An integrated circuit with hot-plug protection is disclosed.
The integrated circuit (30) comprises a plurality of input pins (Pin1, ..., PinN) and at least one output pin (46), and includes a hot-plug protection circuit (40) .
The hot-plug protection circuit (40) comprises:
- a plurality of electrical connections, wherein the input pins in the plurality of input pins (Pin1, ..., PinN) are electrically coupled to a common node (42) in the hot-plug protection circuit (40) via respective electrical connections in the plurality of electrical connections, and
- clamping circuitry (44) coupled between the common node (42) and the at least one output pin (46), the clamping circuitry (44) activatable as a result of a voltage spike applied across the clamping circuitry (44) .
The plurality of electrical connections and the clamping circuitry (44) provide respective current discharge paths between the input pins in the plurality of input pins (Pin1, ..., PinN) and the at least one output pin (46), the respective current discharge paths configured to become conductive as a result of a voltage spike applied to any of said input pins in the plurality of input pins (Pin1, ..., PinN) being transferred to the common node (42) via the respective electrical connection in the plurality of electrical connections electrically coupling said any of said input pins to the common node (42).

公开(公告)号：EP4113840A1

公开(公告)日：2023-01-04

申请号：EP22180456.0

申请日：2022-06-22

Applicant: STMicroelectronics S.r.l.

Inventor： D'ANGELO, Vittorio ,  CANNAVACCIUOLO, Salvatore ,  BENDOTTI, Valerio ,  SELVO, Paolo ,  ALAGNA, Diego

IPC: H03K17/18 ,  H03K17/689

Abstract: An isolated gate driver device (10) has: a low-voltage section (10a), having a control input (IN PWM ), which receives a PWM control signal (S PWM ) at a switching frequency (f PWM_HV ); a high-voltage section (10b), galvanically isolated from the low-voltage section, having a driving output (OUT DRV ), which provides a gate-driving signal (V G ), as a function of the PWM control signal, to a switch (18) of a power stage (14), and a feedback input (IN FB ), which receives at least one feedback signal (S FB ) indicative of the operation of the power stage; and a communication channel (15), which implements an isolated communication between the low-voltage and high-voltage sections. The high-voltage section comprises an ADC module (22), which converts the feedback signal into a digital data stream, and a conversion-control module (24), coupled to the ADC module for providing a conversion-trigger signal (S Trig ) that determines the start of conversion for acquisition of a new sample (S k ) of the feedback signal.