公开(公告)号：EP1895578A1

公开(公告)日：2008-03-05

申请号：EP06425606.8

申请日：2006-09-01

Applicant: STMicroelectronics S.r.l.

Inventor： Bresolin, Camillo ,  Erbetta, Davide ,  Marangon, Maria Santina

IPC: H01L21/311 ,  H01L21/8247 ,  H01L27/115

CPC classification number: H01L21/31111 ,  H01L21/31144 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11531

Abstract: Method for manufacturing an integrated circuit (101; 102; 1) formed on a semiconductor substrate (201; 2) comprising the steps of:
- forming at least one shielding structure (60; 61; 6A, 6B) on said semiconductor substrate (201; 2),
- forming a protective layer (100, 190; 19, 11') at least on portions of the semiconductor substrate (201; 2) that surround said shielding structure (60; 6A, 6B),
- carrying out a ionic implantation step with a tilt angle with respect to a normal to a plane defined by said semiconductor substrate (201; 2) so that said at least one shielding structure (60; 61; 6A, 6B) shields first portions (200; 202; 20, 11A) of the protective layer (100, 190; 19, 11'),
- removing second portions (210; 211; 21, 11B) of the protective layer (100, 190; 19, 11') that have been subjected to the ionic implant.

Abstract translation: 用于制造集成电路的方法（101; 102; 1）形成在半导体衬底上（201; 2）包括以下步骤： - 形成至少一个屏蔽结构（60; 61; 6A，6B）在所述半导体衬底（201 ; 2）， - 形成保护层（100，190;在半导体衬底（201的部分的至少19，11“），2）没有环绕所述屏蔽结构（60; 6A，6B）， - 执行一个离子 有倾斜角度相对于一个垂直于由所述半导体衬底限定的平面注入步骤（201，2），使得所述至少一个屏蔽结构（60; 61; 6A，6B）屏蔽的第一部分（200; 202; 20 中，保护层（100的11A），190; 19，11 '）， - 去除第二部分（210;保护层（100，190的21，图11B）; 211 19，11'）并已经经受 离子植入。

公开(公告)号：EP1686620A1

公开(公告)日：2006-08-02

申请号：EP05425034.5

申请日：2005-01-28

Applicant: STMicroelectronics S.r.l.

Inventor： Brazzelli, Daniela ,  Servalli, Giorgio ,  Erbetta, Davide ,  Marangon, Maria Santina

IPC: H01L21/768 ,  H01L21/8247 ,  H01L27/115

CPC classification number: H01L27/115 ,  H01L27/11521

Abstract: In a process for manufacturing a memory (2) having a plurality of memory cells (3) the steps of: forming a well (11), having a first type of conductivity, within a wafer (10) of semiconductor material; defining active regions (12) within the well (11) extending in a first direction (y); forming memory cells (3) within the active regions (12), each memory cell (3) having a source region (15) with a second type of conductivity, opposite to the first type of conductivity; and forming lines of electrical contact (20), which electrically contact source regions (15) aligned in a second direction (x). In the step of forming lines of electrical contact (20), the step of forming an electrical contact between the source regions (15) and portions (37) of the well (11) adjacent thereto in the second direction (x).

Abstract translation: 在用于制造具有存储器单元（3）的步骤的多个A存储器（2）的方法：形成阱（11），具有第一导电类型的半导体材料的晶片（10）内; 在第一方向（Y）延伸的孔（11）内 - 定义的有源区（12）; 有源区域内形成存储单元（3）（12），每个存储单元（3）具有与第二导电类型的，相反于第一导电类型的源极区（15）; 和在第二方向上排列的电接触件（20），该电接触源极区（15）的成型线（X）。 在形成电接触（20），在第二方向（x）的阱（11）与其相邻的源极区（15）和部分（37）之间的电接触形成的步骤的线的步骤。