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1.
公开(公告)号:EP4333073A1
公开(公告)日:2024-03-06
申请号:EP23182331.1
申请日:2023-06-29
Applicant: STMicroelectronics S.r.l.
Inventor: FIORENZA, Patrick , ROCCAFORTE, Fabrizio , ZANETTI, Edoardo , SAGGIO, Mario Giuseppe
IPC: H01L29/51 , H01L29/78 , H01L29/872 , H01L21/336 , H01L29/12
Abstract: Electronic device (20; 60) comprising: a semiconductor body (48; 68), in particular of Silicon Carbide, SiC, having a first (48a; 68a) and a second face (48b; 68b), opposite to each other along a first direction (Z); and an electrical terminal (G; 82, 74) at the first face (48b; 68b), insulated from the semiconductor body (48; 68) by an electrical insulation region (52; 80). The electrical insulation region is a multilayer comprising: a first insulating layer (102), of a Silicon Oxide, in contact with the semiconductor body; a second insulating layer (104) on the first insulating layer (102), of a Hafnium Oxide; and a third insulating layer (106) on the second insulating layer (104), of an Aluminum Oxide.
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2.
公开(公告)号:EP4020595A1
公开(公告)日:2022-06-29
申请号:EP21217608.5
申请日:2021-12-23
Applicant: STMicroelectronics S.r.l.
Inventor: FIORENZA, Patrick , ROCCAFORTE, Fabrizio , ZANETTI, Edoardo , SAGGIO, Mario Giuseppe
IPC: H01L29/78 , H01L21/336 , H01L29/12 , H01L29/08
Abstract: A MOSFET transistor device has: a functional layer (24) of silicon carbide, having a first conductivity type; gate structures (30) formed on a top surface (24a) of the functional layer and each comprising a dielectric region (31) and an electrode region (32); body wells (26) having a second conductivity type, formed within the functional layer, separated from one another by surface-separation regions (29); source regions (27) having the first conductivity type, formed within the body wells, laterally and partially underneath respective gate structures. Modified-doping regions (40) are arranged in the surface-separation regions centrally thereto, underneath respective gate structures, in particular underneath the corresponding dielectric regions, and have a modified concentration of dopant as compared to the concentration of the functional layer.
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公开(公告)号:EP3742496A1
公开(公告)日:2020-11-25
申请号:EP20176149.1
申请日:2020-05-22
Applicant: STMicroelectronics S.r.l.
Inventor: FIORENZA, Patrick , ROCCAFORTE, Fabrizio , SAGGIO, Mario Giuseppe
IPC: H01L29/51 , H01L29/78 , H01L29/872 , H01L21/336 , H01L29/12
Abstract: An electronic device comprising: a semiconductor body (48; 68) of silicon carbide, SiC, having a first (48a; 68a) and a second face (48b; 68b), opposite to one another along a first direction (Z), which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal (S; 74), which extends at the first face of the semiconductor body; a second conduction terminal (D; 72), which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer (52; 80), of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.
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