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1.
公开(公告)号:EP3930007A1
公开(公告)日:2021-12-29
申请号:EP21180931.4
申请日:2021-06-22
Applicant: STMicroelectronics S.r.l.
Inventor: SAGGIO, Mario Giuseppe , MAGRI', Angelo , ZANETTI, Edoardo , GUARNERA, Alfio
Abstract: Electronic device (100) comprising: a semiconductor body (102) of silicon carbide; a body region (105) at a first surface of the semiconductor body; a source region (108) in the body region (105); a drain region (104) at a second surface of the semiconductor body (102); a doped region (120) extending seamlessly at the entire first surface (102a) of the semiconductor body (102) and including one or more first sub-regions (121) having a first doping concentration and one or more second sub-regions (123) having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.
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2.
公开(公告)号:EP4333073A1
公开(公告)日:2024-03-06
申请号:EP23182331.1
申请日:2023-06-29
Applicant: STMicroelectronics S.r.l.
Inventor: FIORENZA, Patrick , ROCCAFORTE, Fabrizio , ZANETTI, Edoardo , SAGGIO, Mario Giuseppe
IPC: H01L29/51 , H01L29/78 , H01L29/872 , H01L21/336 , H01L29/12
Abstract: Electronic device (20; 60) comprising: a semiconductor body (48; 68), in particular of Silicon Carbide, SiC, having a first (48a; 68a) and a second face (48b; 68b), opposite to each other along a first direction (Z); and an electrical terminal (G; 82, 74) at the first face (48b; 68b), insulated from the semiconductor body (48; 68) by an electrical insulation region (52; 80). The electrical insulation region is a multilayer comprising: a first insulating layer (102), of a Silicon Oxide, in contact with the semiconductor body; a second insulating layer (104) on the first insulating layer (102), of a Hafnium Oxide; and a third insulating layer (106) on the second insulating layer (104), of an Aluminum Oxide.
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公开(公告)号:EP3496153A1
公开(公告)日:2019-06-12
申请号:EP18206678.7
申请日:2018-11-16
Applicant: STMicroelectronics S.r.l.
Inventor: ZANETTI, Edoardo , RASCUNA', Simone , SAGGIO, Mario Giuseppe , GUARNERA, Alfio , FRAGAPANE, Leonardo , TRINGALI, Cristina
IPC: H01L29/872 , H01L21/329 , H01L29/06 , H01L29/16 , H01L29/78
Abstract: A manufacturing method of an electronic device (50), comprising the steps of: forming a drift layer (32) of an N type; forming a trench (38) in the drift layer (32); forming an edge-termination structure (42) alongside the trench (38) by implanting dopant species of a P type; and forming a depression region between the trench (38) and the edge-termination structure (42) by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection (32c) with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
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公开(公告)号:EP4036986A1
公开(公告)日:2022-08-03
申请号:EP22154043.8
申请日:2022-01-28
Applicant: STMicroelectronics S.r.l.
Inventor: SAGGIO, Mario Giuseppe , ZANETTI, Edoardo , FRAZZETTO, Alessia Maria , GUARNERA, Alfio , CAMALLERI, Cateno Marco , GRIMALDI, Antonio Giuseppe
Abstract: The vertical conduction MOSFET device (100)is formed by a body (105) of silicon carbide, which has a first type of conductivity and a face (105A), and by a superficial body region (115) of a second type of conductivity, which has a first doping level, extends into the body, from the face of the body, to a first depth (d sb ) along a first direction, and has a first width (W sb ) along a second direction transversal to the first direction. The MOSFET device is also formed by a source region (120) and by a deep body region (110). The source region is of the first type of conductivity, extends to the inside of the superficial body region, from the face of the body, to a second depth (d b ), along the first direction, and has a second width (W s ) along the second direction, wherein the second depth is smaller than the first depth and the second width is smaller than the first width. The deep body region is of the second type of conductivity, has a second doping level and extends into the body, at a distance from the face of the body and in direct electrical contact with the superficial body region, wherein the second doping level is higher than the first doping level.
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公开(公告)号:EP3605615A1
公开(公告)日:2020-02-05
申请号:EP19189720.6
申请日:2019-08-02
Applicant: STMicroelectronics S.r.l.
Inventor: SAGGIO, Mario Giuseppe , ZANETTI, Edoardo
IPC: H01L29/78 , H01L21/336 , H01L29/06 , H01L29/12
Abstract: A MOSFET device comprising: a structural region, made of a semiconductor material having a first type of conductivity, which extends between a first side and a second side opposite to the first side along an axis; a body region, having a second type of conductivity opposite to the first type, which extends in the structural region starting from the first side; a source region, having the first type of conductivity, which extends in the body region starting from the first side; a gate region, which extends in the structural region starting from the first side, traversing entirely the body region; and a shielding region, having the second type of conductivity, which extends in the structural region between the gate region and the second side. The shielding region is an implanted region self-aligned, in top view, to the gate region.
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6.
公开(公告)号:EP4328967A1
公开(公告)日:2024-02-28
申请号:EP23190203.2
申请日:2023-08-08
Applicant: STMicroelectronics S.r.l.
Inventor: SCALIA, Laura Letizia , CAMALLERI, Cateno Marco , ZANETTI, Edoardo , RUSSO, Alfio
IPC: H01L23/525 , H01L29/78 , H01L23/62
Abstract: SiC-based MOSFET electronic device (20; 30) comprising: a solid body (48); a gate terminal (24), extending into the solid body (48); a conductive path (36), extending at a first side of the solid body (48), configured to be electrically coupeable to a generator (23) of a biasing voltage (V GS ); a protection element (21) of a solid-state material, coupled to the gate terminal (24) and to the conductive path (36), the protection element (21) forming an electronic connection between the gate terminal (24) and the conductive path (36), and being configured to go from the solid state to a melted or gaseous state, interrupting the electrical connection, in response to a leakage current (i SC ) through the protection element (21) greater than a critical threshold; a buried cavity (69) in the solid body (48) accommodating, at least in part, the protection element (21).
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7.
公开(公告)号:EP4036957A1
公开(公告)日:2022-08-03
申请号:EP22153333.4
申请日:2022-01-25
Applicant: STMicroelectronics S.r.l.
IPC: H01L21/336 , H01L29/16 , H01L21/04 , H01L29/78 , H01L29/08 , H01L29/417
Abstract: The vertical conduction MOSFET device (100) is formed by a body (105) of silicon carbide, which has a first conductivity type and a face (105A); by a metallization region (140), which extends on the face of the body; by a body region (115) of a second conductivity type different from the first conductivity type, which extends in the body, from the face of the body, along a first direction (Y) parallel to the face and along a second direction (Z) transverse to the face; and by a source region (120) of the first conductivity type, which extends towards the inside of the body region, from the face of the body. The source region has a first portion (120A) and a second portion (120B), wherein the first portion has a first doping level and extends in direct electrical contact with the metallization region, wherein the second portion has a second doping level and extends in direct electrical contact with the first portion of the source region, and wherein the second doping level is lower than the first doping level.
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8.
公开(公告)号:EP4020595A1
公开(公告)日:2022-06-29
申请号:EP21217608.5
申请日:2021-12-23
Applicant: STMicroelectronics S.r.l.
Inventor: FIORENZA, Patrick , ROCCAFORTE, Fabrizio , ZANETTI, Edoardo , SAGGIO, Mario Giuseppe
IPC: H01L29/78 , H01L21/336 , H01L29/12 , H01L29/08
Abstract: A MOSFET transistor device has: a functional layer (24) of silicon carbide, having a first conductivity type; gate structures (30) formed on a top surface (24a) of the functional layer and each comprising a dielectric region (31) and an electrode region (32); body wells (26) having a second conductivity type, formed within the functional layer, separated from one another by surface-separation regions (29); source regions (27) having the first conductivity type, formed within the body wells, laterally and partially underneath respective gate structures. Modified-doping regions (40) are arranged in the surface-separation regions centrally thereto, underneath respective gate structures, in particular underneath the corresponding dielectric regions, and have a modified concentration of dopant as compared to the concentration of the functional layer.
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9.
公开(公告)号:EP4040498A1
公开(公告)日:2022-08-10
申请号:EP22154844.9
申请日:2022-02-02
Applicant: STMicroelectronics S.r.l.
Inventor: RASCUNA', Simone , BELLOCCHI, Gabriele , ZANETTI, Edoardo , SAGGIO, Mario Giuseppe
IPC: H01L29/06 , H01L29/16 , H01L29/36 , H01L29/66 , H01L29/872
Abstract: The vertical conduction electronic device (50) is formed by a body (55) of wide-bandgap semiconductor material having a first conductivity type and a surface (55A), which defines a first direction (Y) and a second direction (X), wherein the body has a drift region (59, 59A, 59B). The electronic device is further formed by a plurality of superficial implanted regions (62) having a second conductivity type, which extend in the drift region from the surface and delimit between them, in the drift region, at least one superficial portion (68) facing the surface; by at least one deep implanted region (65) having the second conductivity type, which extends in the drift region, at a distance from the surface of the body; and by a metal region (80), which extends on the surface of the body, in Schottky contact with the superficial portion (68) of the drift region.
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