Abstract:
The present invention relates to a current (I) control method for drive systems of multi-phase brushless motors, in particular at phase switching, wherein the motor coils (1,2,3) led to a common node (D) are driven by applying a respective drive voltage to the free end (A,B,C) of each coil (1,2,3) via corresponding power stages (4,5,6). The method comprises switching the current flow from one phase (1-2) to the next (1-3) in the direction of rotation of the motor at the phase switch, thereby forcing the unaffected one (2) of said coils by the phase switch into a state of high impedance. Advantageously, the decreasing rate of the current (I2) in the coil (2) unaffected by the phase switch can be twice as high as the decreasing rate of the current (I1) in the phase being switched from.
Abstract:
A device for the correction of the power factor in power supply units with forced switching operating in transition mode is described. The device comprises a converter (20) and a control device (100) coupled to said converter so as to obtain from an alternating network input voltage (Vin) a regulated output voltage (Vout) on the output terminal. The converter (20) comprises a power transistor (M) and the control device (100) comprises a pilot circuit (51) suitable for determining the period of switched-on time (Ton) and the period of switched-off time (Toff) of said power transistor (M) and control means (50) coupled to said pilot circuits (51) and with said converter and which are capable of prolonging said period of switched-on time (Ton) of the power transistor (M) at the instants of time in which the alternating network voltage (Vin) substantially assumes the value zero.
Abstract:
A method of testing an integrated circuit (1; 100) comprising a programmable, non-volatile memory with a matrix (2; 20) of memory cells comprises a step of programming substantially all of the memory cells of the matrix (2; 20), and a step of accessing the programmed memory cells in order to identify the lowest threshold voltage of the programmed cells, the latter step providing for the addressing, in succession, of all of the locations of the memory of which the memory cells have been programmed and, for each location addressed: a) the supply of an initial selection voltage definitely lower than the lowest threshold voltage to a line (WL; WL1-WL8) of the matrix (2; 20) corresponding to the location currently addressed, b) a reading of the cells of the location currently addressed with the use of reading circuits (SA; 21) of the memory, c) repetition of step b), progressively increasing the selection voltage supplied to the line (WL; WL1-WL8) of the matrix (2; 20) corresponding to the location currently addressed until it is detected that at least one of the bits of the location currently addressed has switched, the selection voltage for which the switching is detected being the lowest threshold voltage, d) comparison of the lowest threshold voltage of the location currently addressed with a stored value corresponding to the lowest of the lowest threshold voltages of the locations previously addressed, and e) storage of the lowest threshold voltage of the location currently addressed if it is lower than the stored value.
Abstract:
A device is described for the correction of the power factor in power supply units with forced switching operating in transition mode. Said device comprises a converter (20) and a control device (100, 500) coupled with said converter (20) so as to obtain a regulated voltage (Vout) on the output terminal from an alternating network input voltage (Vin). The converter (20) comprises a power transistor (M) whilst the control device (100, 500) comprises a pilot circuit (3, 5, 6) suitable for determining the switch-on time (Ton) and the switch-off time (Toff) of the power transistor (M). The control device (100, 500) furthermore comprises control means (200, 400, 600) coupled with said pilot circuit (3, 5, 6) and with said converter (20) and capable of prolonging the switch-on time (Ton) of the power transistor (M) at the instants of time wherein the alternating network voltage (Vin) substantially takes on the value zero.
Abstract:
The present invention refers to a switching power supply, in particular to a power factor corrector (PFC), and more particularly to a circuit for the programmable protection of output overvoltages. It also refers to a power factor corrector integrated circuit comprising a circuit for the programmable protection of output overvoltages. In one embodiment the circuit for the programmable protection of output overvoltages in a power factor corrector comprises means (R1, R2) for detecting a signal proportional to the output voltage; a first preset reference voltage (Vref1); a second preset reference voltage (Vref2); a transconductance amplifier (18) which receives in input said signal proportional to the output voltage and said first preset reference voltage (Vref1); a comparator (21) which receives in input said signal proportional to the output voltage and said second preset reference voltage (Vref2); means (Rint) suitable for absorbing a current coming from said signal proportional to the output voltage.
Abstract:
The system comprises means (3, G1, G2, 12) for the controlled supply of the reactive load (Cl), for supplying variable quantities of energy to the load in a predetermined manner, reactive components (Cr, Lr) which are connected to the load (Cl) by means of a controllable electronic switch (T3) and which form a resonant circuit with the load when the electronic switch (T3) is closed, means (10) for activating the electronic switch (T3), and a control unit (14) which coordinates the operation of the controlled supply means and of the activation means in accordance with a predetermined program. The system enables the load to be driven with a particularly low power dissipated.