公开(公告)号：EP1119104B1

公开(公告)日：2009-06-17

申请号：EP00830028.7

申请日：2000-01-20

Applicant: STMicroelectronics S.r.l.

Inventor： Grimaldi, Antonio ,  Arcuri, Luigi ,  Pisano, Salvatore

IPC: H03K17/082 ,  H03K17/0812

CPC classification number: H03K17/0822 ,  H03K17/08122

公开(公告)号：EP2551910A1

公开(公告)日：2013-01-30

申请号：EP12178140.5

申请日：2012-07-26

Applicant: STMicroelectronics S.r.l.

Inventor： Corona, Donato ,  Sammatrice, Giovanni ,  Amara, Sebastiano ,  Pisano, Salvatore ,  Grimaldi, Antonio Giuseppe

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L21/331

Abstract: An insulated gate semiconductor device (30; 60; 90; 100; 150), comprising: a semiconductor body (32, 34, 36; 102, 104, 106) having a front side (32a; 36a; 106a) and a back side (32b; 102b) opposite to one another; a drift region (36; 106'), which extends in the semiconductor body and has a first type of conductivity and a first doping value; a body region (38; 108; 156) having a second type of conductivity, which extends in the drift region facing the front side of the semiconductor body; a source region (40; 113), which extends in the body region and has the first type of conductivity; and a buried region (44; 114) having the second type of conductivity, which extends in the drift region at a distance from the body region and at least partially aligned to the body region in a direction (Z) orthogonal to the front side and to the back side.

Abstract translation: 一种绝缘栅半导体器件（30; 60; 90; 100; 150），包括：半导体主体（32，34，36; 102，104，106）具有前侧（32A; 36A; 106A）和背面 （32B; 102B）彼此相对; 的漂移区（36; 106“），其在半导体本体延伸，并且具有第一导电类型和第一掺杂值; （38; 108; 156）是具有第二型导电性的，它在朝向半导体本体的前侧的漂移区延伸的体区; 一个源极区（40; 113），其中在所述主体区域延伸，并且具有第一导电类型的; 和埋入区（44; 114）具有第二导电类型，其中在所述漂移区在从所述主体区域的距离延伸，并且至少部分地对准到主体区的方向（Z）正交于所述前侧和 到背面。

公开(公告)号：EP2551910B1

公开(公告)日：2020-05-06

申请号：EP12178140.5

申请日：2012-07-26

Applicant: STMicroelectronics S.r.l.

Inventor： Corona, Donato ,  Sammatrice, Giovanni ,  Amara, Sebastiano ,  Pisano, Salvatore ,  Grimaldi, Antonio Giuseppe

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L21/331

公开(公告)号：EP1119104A1

公开(公告)日：2001-07-25

申请号：EP00830028.7

申请日：2000-01-20

Applicant: STMicroelectronics S.r.l.

Inventor： Grimaldi, Antonio ,  Arcuri, Luigi ,  Pisano, Salvatore

IPC: H03K17/082 ,  H03K17/0812

CPC classification number: H03K17/0822 ,  H03K17/08122

Abstract: The MOS-type power device (1) has a drain terminal (4), a source terminal (3), and a gate terminal (2), and comprises a protection circuit (11) having a first conduction terminal connected to the gate terminal (2), via a diffused resistor (5), and a second conduction terminal connected to the source terminal (3). The protection circuit (11) has a resistance variable between a first value and a second value according to the operating condition of the power device (1). A first embodiment of the protection circuit (11) comprises an ON-OFF switch (12) made by means of a horizontal MOS transistor which has a control terminal connected to the drain terminal (4) of the power device (1). A second embodiment of the protection circuit (11) envisages the replacement of the ON-OFF switch (12) with a gradual-intervention switch (23) made by means of a P-channel JFET transistor having a control terminal connected to the gate terminal (2) of the power device (1).

Abstract translation: MOS型功率器件（1）具有漏极端子（4），源极端子（3）和栅极端子（2），并且包括保护电路（11），其具有连接到栅极端子 （2），经由扩散电阻（5）和连接到源极端子（3）的第二导电端子。 根据功率器件（1）的工作状态，保护电路（11）具有在第一值和第二值之间的电阻变化。 保护电路（11）的第一实施例包括通过水平MOS晶体管制成的导通断开关（12），其具有连接到功率器件（1）的漏极端子（4）的控制端子。 保护电路（11）的第二实施例设想用通过具有连接到栅极端子的控制端子的P沟道JFET晶体管制成的逐步干预开关（23）来替换导通开关（12） （1）的电源（2）。