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1.发明授权Method for improving the intermediate dielectric profile, particularly for non-volatile memories 失效为了提高中间介电曲线，特别是用于非易失性存储器的方法
公开(公告)号：EP0793273B1
公开(公告)日：2003-12-10
申请号：EP96830086.3
申请日：1996-02-28
Applicant: STMicroelectronics S.r.l.
Inventor： Brambilla, Claudio , Ginami, Giancarlo , Daffra, Stefano , Ravaglia, Andrea , Cereda, Manlio Sergio
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L27/11521 , H01L27/115
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2.发明授权Process for manufacturing MOS-type integrated circuits comprising LOCOS isolation regions 失效一种用于生产所述LOCOS型隔离区的方法为MOS型的集成电路
公开(公告)号：EP0545082B1
公开(公告)日：2000-09-27
申请号：EP92118785.2
申请日：1992-11-02
Applicant: STMicroelectronics S.r.l.
Inventor： Cereda, Manlio Sergio , Ginami, Giancarlo , Laurin, Enrico , Ravaglia, Andrea
CPC classification number: H01L27/11526 , H01L21/76216 , H01L21/76218 , H01L21/823878 , H01L27/11546
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