公开(公告)号：EP1566957B1

公开(公告)日：2007-09-26

申请号：EP04425101.5

申请日：2004-02-18

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Limited

Inventor： Gardella, Pier Luigi ,  Barone, Massimiliano ,  Sweet, Gary ,  Pau, Danilo ,  Hill, Stephen ,  Goda, Simon

IPC: H04N1/41 ,  H04N1/64 ,  G06T3/40 ,  H04N7/26 ,  G09G5/02

CPC classification number: H04N19/00 ,  G09G3/2051 ,  G09G5/02 ,  H04N1/40087 ,  H04N19/42 ,  H04N19/90

公开(公告)号：EP1566957A1

公开(公告)日：2005-08-24

申请号：EP04425101.5

申请日：2004-02-18

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Limited

Inventor： Gardella, Pier Luigi ,  Barone, Massimiliano ,  Sweet, Gary ,  Pau, Danilo ,  Hill, Stephen ,  Goda, Simon

IPC: H04N1/41 ,  H04N1/64 ,  G06T3/40 ,  H04N7/26 ,  G09G5/02

CPC classification number: H04N19/00 ,  G09G3/2051 ,  G09G5/02 ,  H04N1/40087 ,  H04N19/42 ,  H04N19/90

Abstract: A dither matrix is applied to a high-resolution image to compare the value of each of the pixels that compose it with a threshold value of the matrix and to obtain an output value of the matrix (Dither matrix value) from each comparison. To each pixel value (in_value_r) of the image there is applied the algorithm represented by the schematic layout of Figure 7 to obtain the pixel values (Out_r) of a low-resolution image. C 1 -C 5 and n 1 -n 10 are parameters that may be selected by means of predetermined criteria based on comparisons of the low-resolution image, obtained by means of the operations described above, with an equivalent low-resolution image obtained by means of a sample method.

Abstract translation: 将抖动矩阵应用于高分辨率图像，以将构成它的每个像素的值与矩阵的阈值进行比较，并从每个比较中获得矩阵（抖动矩阵值）的输出值。 对于图像的每个像素值（in_value_r），应用由图7的原理图布局表示的算法，以获得低分辨率图像的像素值（Out_r）。 C1-C5和n1-n10是可以通过基于通过上述操作获得的低分辨率图像与通过样本获得的等效低分辨率图像的比较的预定标准来选择的参数 方法。

公开(公告)号：EP1496475A1

公开(公告)日：2005-01-12

申请号：EP03015270.6

申请日：2003-07-07

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Limited

Inventor： Barone, Massimiliano ,  Pau, Danilo Pietro ,  Gardella, Pierluigi ,  Goda, Simon James ,  Hill, Stephen Adrian ,  Sweet, Gary James ,  Robart, Mathieu

IPC: G06T15/00 ,  G06T15/40

CPC classification number: G06T15/005 ,  G06T15/40

Abstract: A geometric processing stage (111b) for a pipelined engine for processing video signals and generating processed video signal in space coordinates (S) adapted for display on a screen. The geometric processing stage (111b) includes:

a model view module (201) for generating projection coordinates of primitives of the video signals in a view space, said primitives including visible and non-visible primitives,
a back face culling module (309) arranged downstream of the model view module (201) for at least partially eliminating the non visible primitives,
a projection transform module (204) for transforming the coordinates of the video signals from view space coordinates into normalized projection coordinates (P), and
a perspective divide module (208) for transforming the coordinates of the video signals from normalized projection (P) coordinates into screen space coordinates (S).

The back face culling module (309) is arranged downstream the projection transform module (204) and operates on normalized projection (P) coordinates of said primitives. The perspective divide module (208) is arranged downstream the back face culling module (309) for transforming the coordinates of the video signals from normalized projection (P) coordinates into screen space coordinates (S). A circuit (10) in the back face culling module can be shared with a standard three dimension back face culling operation when necessary.
A preferred application is in graphic engines using standard graphics language like OpenGL and NokiaGL.

Abstract translation: 用于在适用于在屏幕上显示空间坐标（S）的视频信号并产生已处理的视频信号的流水线处理引擎的几何处理级（111B）。 几何处理级（111B），包括：用于在视觉空间生成的原始视频信号的投影坐标的模型视图模块（201），所述原语包括可见和不可见图元，设置在背面剔除模块（309） 用于从视觉空间变换所述视频信号的坐标模型视图模块（201）用于至少部分地消除所述非可见原始，投影变换模块（204）的下游坐标转换成归一化的投影坐标（P），和一个透视分割 模块（208），用于从归一化的投影（P）变换所述视频信号的坐标坐标转换成屏幕空间坐标（S）。 的背面剔除模块（309）的下游布置在投影变换模块（204）和操作上归一化的投影（P）。所述原始的坐标。 在透视分割模块（208）被布置在下游的背面剔除模块（309），用于从归一化的投影（P）变换所述视频信号的坐标坐标转换成屏幕空间坐标（S）。 所述背面剔除模块中的电路（10）可以与标准三维背面共享剔除操作时是必要的。 一个优选的应用是在使用如OpenGL和NokiaGL标准图形语言的图形引擎。

公开(公告)号：EP1496704A1

公开(公告)日：2005-01-12

申请号：EP03015269.8

申请日：2003-07-07

Applicant: STMicroelectronics S.r.l.

Inventor： Sirtori, Daniele ,  Pau, Danilo Pietro ,  Gardella, Pierluigi ,  Barone, Massimiliano ,  Falchetto, Mirko

IPC: H04N7/26

CPC classification number: G06T15/005 ,  G06T9/001 ,  H04N19/29 ,  H04N19/31 ,  H04N19/42 ,  H04N19/517 ,  H04N19/537 ,  H04N19/577 ,  H04N19/587

Abstract: A graphic system comprising a pipelined tridimensional graphic engine for generating image frames for a display inlcudes a graphic engine (110;210) comprising at least one geometric processing elaboration stages (111, 112), performing motion motion extraction. The engine also includes a rendering stage (113) generating full image frames (KF) at a first frame rate (F2) to be displayed at a second frame rate (F1), higher than the first frame rate (F2). The pipelined graphic engine further comprises a motion encoder (214) receiving motion vector information (MB) and suitable for coding the motion information e.g. with a variable length code, while generating a signal (R4) representative of interpolated frames (IF). The motion encoder (214) exploits the motion information (MB) as generated by the geometric elaboration stages (211, 212). A motion compensation stage (237) is provided fed with the signal representative of interpolated frames (IF) and full image frames for generating said the interpolated frames (IF). A preferred application is in graphic engines intended to operate in association with smart displays through a wireless connection, i.e. in mobile phones.

Abstract translation: 一种图形系统，包括用于生成用于显示器的图像帧的流水线三维图形引擎，包括包括至少一个几何处理制作阶段（111,112）的图形引擎（110; 210），执行运动运动提取。 引擎还包括以比第一帧速率（F2）更高的以第二帧速率（F1）显示的以第一帧速率（F2）产生全图像帧（KF）的渲染级（113）。 流水线图形引擎还包括运动编码器（214），其接收运动矢量信息（MB）并且适于对运动信息进行编码。 同时产生表示内插帧（IF）的信号（R4）。 运动编码器（214）利用由几何制作阶段（211,212）产生的运动信息（MB）。 提供运动补偿级（237），其馈送代表内插帧（IF）的信号和用于产生所述内插帧（IF）的全图像帧。 优选的应用是旨在通过无线连接（即在移动电话中）与智能显示器相关联地操作的图形引擎。

公开(公告)号：EP2026283A2

公开(公告)日：2009-02-18

申请号：EP08161219.4

申请日：2008-07-25

Applicant: STMicroelectronics S.r.l.

Inventor： Barone, Massimiliano ,  Terruzzi, Davide

IPC: G06T11/00 ,  G06T11/20 ,  G06T5/00

CPC classification number: G06T11/001 ,  G06T11/40 ,  G06T15/005

Abstract: An antialiasing method, comprising:
providing a first fragment;
computing a first coverage area representing a portion of the first fragment covered by a first primitive;
providing a second fragment juxtaposed to the first fragment and at least partially covered by a second primitive;
processing the first coverage area to obtain a corrected coverage area indicative of a visible first fragment portion resulting from the juxtaposition of said fragments;
applying an antialiasing procedure based on said corrected coverage area.

Abstract translation: 一种抗混叠方法，包括：提供第一片段; 计算表示由第一原语所覆盖的第一片段的一部分的第一覆盖区域; 提供与所述第一片段并置并且至少部分地被第二原语覆盖的第二片段; 处理第一覆盖区域以获得指示由所述片段并置产生的可见第一片段部分的校正覆盖区域; 基于所述修正的覆盖区域应用抗混叠程序。

公开(公告)号：EP1416641A1

公开(公告)日：2004-05-06

申请号：EP02425660.4

申请日：2002-10-30

Applicant: STMicroelectronics S.r.l.

Inventor： Barone, Massimiliano

IPC: H03M7/46 ,  H03M7/48 ,  G11C29/00

CPC classification number: G11C29/40 ,  G11C29/44 ,  H03M7/46 ,  H03M7/48

Abstract: Described herein is a method for compressing a sequence of repetitive data, which uses in combination one or more words with a format for non-compressible data and one or more words with a format for compressible data, in which a word with a format for non-compressible data is made up of a set of bits, in which the most significant bit is set at the logic value "1" and the remaining bits are the bits of a non-compressible datum to be encoded, whilst a word with a format for compressible data is made up of a set of bits, in which the most significant bit is set at a the logic value "0", the next five most significant bits indicate the total number of subsequent words which encode the sequence of repetitive data, and the remaining eleven bits indicate the number of times that the words indicated by the preceding five most significant bits are repeated.

Abstract translation: 使用非可压缩和可压缩数据的组合对重复数据的序列进行编码。 非压缩数据的最高有效位（MSB）设置为逻辑1'，而其余位是数据位。 压缩数据的MSB设置为逻辑值0'。 接下来的五个MSB显示编码重复数据所需的单词总数，而剩余的位表示重复次数。

公开(公告)号：EP1388788A1

公开(公告)日：2004-02-11

申请号：EP02425519.2

申请日：2002-08-08

Applicant: STMicroelectronics S.r.l.

Inventor： Barone, Massimiliano ,  Griseta, Antonio

IPC: G06F11/267 ,  G01R31/3187

CPC classification number: G06F11/27 ,  G01R31/3187

Abstract: A built-in self-test (BIST) circuit adapted to be embedded in an integrated circuit ( 101 ) for testing the integrated circuit, including in particular a collection of addressable elements, for example a semiconductor memory. The BIST circuit comprises a general-purpose data processor ( 105 ) programmable for executing a test program for testing the integrated circuit. The BIST circuit comprises an accelerator circuit ( 113 ) cooperating with the general-purpose data processor for autonomously conducting operations on the integrated circuit according to the test program. The accelerator circuit comprises configuration means ( 201,203,233,301,303,501 ) adapted to be loaded with configuration parameters for adapting the accelerator circuit to the specific type of integrated circuit and the specific type of test program. ( FIG. 1 )

Abstract translation: 内置的自检（BIST）电路，适于嵌入集成电路（101）中，用于测试集成电路，特别包括可寻址元件的集合，例如半导体存储器。 BIST电路包括可编程用于执行用于测试集成电路的测试程序的通用数据处理器（105）。 BIST电路包括与通用数据处理器协作的加速器电路（113），用于根据测试程序自动地对集成电路进行操作。 加速器电路包括适于加载用于使加速器电路适应特定类型的集成电路的配置参数和特定类型的测试程序的配置装置（201,203,233,301,303,501）。 （图1）

公开(公告)号：EP1445734B1

公开(公告)日：2007-08-08

申请号：EP03002728.8

申请日：2003-02-06

Applicant: STMicroelectronics S.r.l.

Inventor： Gardella, Pierluigi Michele ,  Barone, Massimiliano ,  Alfonso, Daniele ,  Pau, Danilo Pietro ,  Lavigna, Daniele

IPC: G06T9/00

CPC classification number: G06T9/005

公开(公告)号：EP1443461B1

公开(公告)日：2006-11-02

申请号：EP03002205.7

申请日：2003-01-31

Applicant: STMicroelectronics S.r.l.

Inventor： Barone, Massimiliano ,  Vitali, Andrea ,  Pau, Danilo Pietro ,  Sirtori, Daniele ,  Lavigna, Daniele ,  Gardella, Pierluigi

IPC: G06T9/00

CPC classification number: G06T9/005

公开(公告)号：EP1443461A1

公开(公告)日：2004-08-04

申请号：EP03002205.7

申请日：2003-01-31

Applicant: STMicroelectronics S.r.l.

Inventor： Barone, Massimiliano ,  Vitali, Andrea ,  Pau, Danilo Pietro ,  Sirtori, Daniele ,  Lavigna, Daniele ,  Gardella, Pierluigi

IPC: G06T9/00

CPC classification number: G06T9/005

Abstract: A method for texture compressing images having a plurality of color components (R, G, B) includes the step of defining color representatives for use in encoding by defining groups of colors for each said color component (R,G,B), and selecting for each said group a representative color for the group, the median color being chosen as the representative color of the group. Each said group is preferably composed of 3 to 15 colors and the method includes the step of computing, for each group, an error between each member of the group and said representative color of the group. Typically, the error is computed as the sum of the absolute differences (SAD) between each member of the group and said representative color of the group. In order to select each said group and then extract therefrom said representative color, a criterium is used selected from the group consisting of:

selecting the group that minimizes said error by assuming each group comprised of the lower colors sorted in ascending order, wherein the same applies for the groups comprised of the higher colors,
accruing the error as computed separately for two groups in all possible combinations and finding the minimum of the composite error.

Abstract translation: 用于纹理压缩具有多个颜色分量（R，G，B）的图像的方法包括通过为每个所述颜色分量（R，G，B）定义颜色组来定义用于编码的颜色代表的步骤，以及选择 对于每个所述组，该组的代表颜色，中间颜色被选择为该组的代表颜色。 每个所述组优选地由3至15种颜色组成，并且该方法包括以下步骤：针对每个组计算组的每个成员与组的所述代表颜色之间的误差。 通常，误差被计算为组的每个成员与组的所述代表颜色之间的绝对差（SAD）之和。 为了选择每个所述组，然后从其中提取所述代表性颜色，使用选自以下的标准：选择通过假设由按升序排列的较低颜色组成的每个组，使所述误差最小化的组，其中相同 适用于由较高颜色组成的组，在所有可能的组合中分别计算出两组的误差，并找出复合误差的最小值。