Abstract:
A system for estimating motion from a sequence of bidimensional arrays of sampled values (e.g. video frames) includes a motion estimator (PC) configured for performing motion estimation between a current frame and a reference frame to derive an estimated motion vector (V). The motion estimator (PC) is configured for performing, if at least one of the components of the estimated motion vector is null, at least one of the steps of:
a) maintaining said reference frame as the reference frame for motion estimation with a further frame in said sequence, and b) reducing the frame rate of said sequence of arrays.
Preferred application is in optical mouse arrangements.
Abstract:
Transcoder apparatus for transcoding an input video bit-stream (I) having a first encoding profile (e.g. MPEG-2) into an output video bit-stream (O) having a second encoding profile (e.g. H.264), the first encoding profile including motion estimation information, the apparatus including:
a front-end (30, 40, 50, 60, 70, 80) for extracting (30) the motion estimation information (110) from the input video bit-stream (I), and a back-end (120, 130, 135, 140, 150, 160, 170, 180, 190, 200, 210, 220, 230) for constructing the output bit-stream (O).
The front-end and the back-end of the apparatus are interconnected (e.g. via a buffer 90) to pass the motion estimation information (110) from the front-end on to the back-end, thereby avoiding motion estimation in constructing the output bit-stream (O) at the apparatus back-end.
Abstract:
A method of controlling operation of a network wherein at least one coded information stream (I') is delivered to at least one user via at least one link (20, 40) exposed to variable operating conditions, the method including the steps of:
monitoring the operating conditions of the at least one link (20, 40), and selectively transcoding the at least one coded information stream (I') by selectively varying at least one transcoding parameter (Q) as a function of the operating conditions monitored. The monitoring operating conditions of the at least one link includes evaluating a set of cost functions (QUANTIZATION_COST, MOTION_COST, DETAILS_COST) related to an available bit rate (R) and to complexity of said coded information stream (I') and
the selective variation of at least one transcoding parameter (Q) includes selecting among a plurality of transcoding levels (T1, T2, T3, T4) associated to different values of quantization, resolution and frame rate.
Abstract:
A system for controlling operation of a network such as a WLAN (200, 300) where at least one information stream is delivered to at least one user (250, 260; 350, 360) via at least one link exposed to variable operating conditions. The system includes:
a controller module (410) configured for monitoring the operating conditions (400, 410) of said link, and at least one transcoder (210, 310) configured for selectively transcoding (210, 310) the information stream by selectively varying one or more transcoding parameters as a function of the operating conditions monitored.
Abstract:
A method for encoding and/or decoding video signals, including the operations of generating at a transmitter side a multiple descriptions vector ( d → ) associated to a pixel values vector ( p → ) of the video signals and decoding at a receiver side available descriptions vector ( d → ') for reconstructing the pixel values vector ( p → ). The operation of generating a multiple descriptions vector ( d → ) includes the steps of obtaining the pixel values vector ( p → ) by selecting a group (G) of pixels in a picture (PK) of the video signal and applying an encoding matrix ( M ) to the pixel values vector ( p → ). The decoding operation includes the step of applying, the available descriptions vector ( d → ') in order to obtain the pixel values vector ( p → ) a decoding matrix ( M ') that is in a inversion relationship with the encoding matrix ( M ).
Abstract:
The program to be executed is compiled by translating it into native instructions of the instruction-set architecture (ISA) of the processor system (SILC 1, SILC 2), organizing the instructions deriving from the translation of the program into respective bundles in an order of successive bundles, each bundle grouping together instructions adapted to be executed in parallel by the processor system. The bundles of instructions are ordered into respective sub-bundles, said sub-bundles identifying a first set of instructions ("must" instructions), which must be executed before the instructions belonging to the next bundle of said order, and a second set of instructions ("can" instructions), which can be executed both before and in parallel with respect to the instructions belonging to said subsequent bundle of said order. There is defined a sequence of execution of the instructions in successive operating cycles of the processor system (SILC 1, SILC 2), assigning each sub-bundle to an operating cycle, thus preventing simultaneous assignment to the same operating cycle of two sub-bundles belonging to the first set ("must" set) of two successive bundles. The instructions of the sequence may be executed by the various processors of the system (SILC 1, SILC 2) in conditions of binary compatibility.
Abstract:
A moving-image signal, such as typically a luminance signal organized in blocks of pixels (10; 20) is coded via a technique that envisages the steps of: - comparing a block to be coded (10) with a plurality of candidate prediction blocks (20); - determining, for each candidate prediction block (20), a respective value of an index (SRS) representing the difference between the block to be coded (10) and each candidate prediction block (20); and - choosing between the candidate prediction blocks (20), as a function of the respective value of the aforesaid index (SRS), a prediction block to be used for coding (30, 40) of the block to be coded. The signal is sampled pixel by pixel on the block to be coded (10) and on the plurality of candidate prediction blocks (20), thus generating respective surfaces representing the pattern of the signal in the block to be coded (10) and in the candidate prediction blocks (20). Chosen as index is an index of the parallelism between the aforesaid respective surfaces.
Abstract:
Programs having a given instruction-set architecture (ISA) are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length (L1 respectively L2) executable on a first processor (VLIW 1 respectively VLIW 2). At least some of the instruction words of given length are converted (IIU) into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of:
splitting the instruction words into modified-instruction words; and entering no-operation (nop) instructions in the modified-instruction words.