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    Edge-mounted, surface-mount package for semiconductor integrated circuit devices
    2.
    发明公开
    Edge-mounted, surface-mount package for semiconductor integrated circuit devices 失效
    Randmontierte Packung vomOberflächen-Montierungstyp，fürintegrierte Halbleiterschaltungsanordnungen。

    公开(公告)号：EP0333374A2

    公开(公告)日：1989-09-20

    申请号：EP89302297.0

    申请日：1989-03-08

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Baudouin, Daniel A. ,  Russell, Ernest J.

    IPC: H05K3/30 ,  H01L23/50 ,  H01L23/495 ,  H01L23/04

    CPC classification number: H05K3/303 ,  H01L23/49555 ,  H01L2924/0002 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10696 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00

    Abstract: A flat package (10) for semiconductor integrated circuit devices allows edge-mounting and surface-mount. The package may be molded plastic (12) containing a semiconductor chip (11), and flat leads (14) extend from one edge of the package. The leads are bent to provide an area (18) to solder to conductors on a PC board. Mechanical positioning, mechanical support and spacing are provided by studs (15) extending from the edge of the package adjacent the leads. The studs have stops (17) formed at a position even with flat outer surfaces of the bent leads; the portion outward of the stops fits into holes in the PC board.

    Abstract translation: 用于半导体集成电路器件的扁平封装（10）允许边缘安装和表面贴装。 封装可以是包含半导体芯片（11）的模制塑料（12），并且扁平引线（14）从封装的一个边缘延伸。 引线被弯曲以提供焊接到PC板上的导体的区域（18）。 机械定位，机械支撑和间距由靠近引线的封装边缘延伸的螺柱（15）提供。 螺栓具有形成在即使具有弯曲引线的平坦外表面的位置的止动件（17） 止动件外侧的部分装配到PC板中的孔中。

    Reduced capacitance lead frame for lead on chip package
    4.
    发明公开
    Reduced capacitance lead frame for lead on chip package 失效
    Leiterrahmen mit reduzierter KapazitanzfürLeiter-auf-Chip-Packung。

    公开(公告)号：EP0587112A1

    公开(公告)日：1994-03-16

    申请号：EP93114331.7

    申请日：1993-09-07

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Russell, Ernest J.

    IPC: H01L23/495

    CPC classification number: H01L23/4951 ,  H01L23/49548 ,  H01L24/48 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

    Abstract: In a lead on chip, LOC, integrated circuit packaging arrangement (10), the conductors (46) terminate in fingers (50) that receive the bond wires (20). Adjacent the fingers (50), the conductors (46) have arm parts (52) extending over the major face of the integrated circuit (12). These arm parts (52) are formed by stamping, rolling or otherwise to present an upwardly opening channel with at least the bottom lateral margins (54, 56) of the arm part (52) raised above the plane of the bottom surface (58) of the arm part (52). This reduces sagging of the arm part (52) and capacitive interaction with the integrated circuit.

    Abstract translation: 在芯片引线（LOC）集成电路封装装置（10）中，导体（46）终止于接收接合线（20）的指状物（50）中。 在手指（50）附近，导体（46）具有在集成电路（12）的主表面上延伸的臂部分（52）。 这些臂部件（52）通过冲压，滚动或以其它方式形成以呈现向上开口的通道，其中臂部分（52）的至少底侧横向边缘（54,56）在底面（58）的平面上方升高， 的臂部（52）。 这减少了臂部分（52）的下垂和与集成电路的电容性相互作用。

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