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    Integrated circuit with air gaps and its manufacturing method
    1.
    发明专利
    Integrated circuit with air gaps and its manufacturing method 审中-公开

    公开(公告)号：JP2004172620A

    公开(公告)日：2004-06-17

    申请号：JP2003385281

    申请日：2003-11-14

    Applicant: United Microelectronics Corp ,  聯華電子股▲ふん▼有限公司

    Inventor： RO KATETSU ,  RI DAII ,  WANG KUANG-CHIH ,  YANG MING-SHENG

    IPC: H01L23/522 ,  H01L21/027 ,  H01L21/768 ,  H01L23/52

    Abstract: PROBLEM TO BE SOLVED: To provide a high-performance integrated circuit, particularly an integrated circuit with air gaps that fully supports metal interconnection, for the solution of problems associated with the prior art. SOLUTION: The structure of the integrated circuit comprises: a substrate 11 with an underlayer 12; the first metallic pattern 13 formed in the underlayer; the second metallic layer 17 formed above the first metallic pattern; a supporting structure with an isotropic-etched dielectric layer 14 that supports the second metallic pattern formed between the first metallic pattern and the second metallic pattern; and multiple air gaps 18a formed in a gap in the second metallic pattern that is composed of a capping layer 19. COPYRIGHT: (C)2004,JPO

    DOUBLE WAVEFORM PATTERN STRUCTURE AND ITS FORMING METHOD
    2.
    发明专利
    DOUBLE WAVEFORM PATTERN STRUCTURE AND ITS FORMING METHOD 失效

    公开(公告)号：JP2000021879A

    公开(公告)日：2000-01-21

    申请号：JP31315898

    申请日：1998-11-04

    Applicant: UNITED MICROELECTRONICS CORP

    Inventor： HUANG YIMIN ,  YANG MING-SHENG ,  YEW TRI-RUNG

    IPC: H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52

    Abstract: PROBLEM TO BE SOLVED: To avoid excessively polishing a metal line which would increase the resistance of metal lines and the parasitic capacitance between conductor lines by forming a double waveform pattern, using shallow dummy metal lines. SOLUTION: A thin adhesive layer 328 is formed in shallow metal line trenches and on the surface of an inter-metal dielectric layer 317 along the side walls and bottoms of second metal line trenches, vias, and third metal line trenches, a metal layer and adhesive layer 328 located higher than the inter-metal dielectric layer 317 are polished by the chemical-mechanical polishing to result in that metal layer filled in the second metal line trenches, third metal line trenches 326 and shallow dummy metal line trenches have the same height as the inter-metal dielectric layer 317, thereby avoiding excessively polishing the metal lines which would increase the resistance and hence the operation speed of the device not becomes low because of a small parasitic capacitance.

    Chemical mechanical polishing methods using low pH slurry mixtures
    3.
    发明授权
    Chemical mechanical polishing methods using low pH slurry mixtures 失效
    使用低pH浆料混合物的化学机械抛光方法

    公开(公告)号：US6362101B2

    公开(公告)日：2002-03-26

    申请号：US97660597

    申请日：1997-11-24

    Applicant: UNITED MICROELECTRONICS CORP

    Inventor： YANG MING-SHENG ,  WU JUAN-YUAN ,  LUR WATER ,  SUN SHIH-WEI

    IPC: H01L21/304 ,  C09K3/14 ,  H01L21/321 ,  H01L21/302

    CPC classification number: H01L21/3212 ,  C09K3/1463

    Abstract: A method for chemical mechanical polishing a component includes providing an oxide layer and forming at least one via through the oxide layer. A tungsten layer is formed within the via and over the oxide layer. A first chemical mechanical polishing step is carried out on a polishing pad using a first slurry having an oxidizing component and having a pH of approximately 2 to approximately 4 to remove the tungsten layer from over the oxide layer. A second chemical mechanical polishing step is carried out on the polishing pad using a second slurry having a pH of approximately 2 to approximately 4 to polish scratches out of the oxide layer.

    Abstract translation: 用于化学机械抛光组分的方法包括提供氧化物层并通过氧化物层形成至少一个通孔。 在通孔内和氧化物层上形成钨层。 在抛光垫上使用具有氧化成分的第一浆料并且具有约2至约4的pH进行第一化学机械抛光步骤以从氧化物层上方除去钨层。 使用pH为约2〜约4的第二浆料在抛光垫上进行第二化学机械抛光步骤以抛光出氧化物层的划痕。

    7.
    发明专利
    未知

    公开(公告)号：NL1007819C2

    公开(公告)日：1999-06-21

    申请号：NL1007819

    申请日：1997-12-17

    Applicant: UNITED MICROELECTRONICS CORP

    Inventor： YANG MING-SHENG ,  WU JUAN-YUAN ,  LUR WATER ,  SUN SHIH-WEI

    IPC: C09K3/14 ,  H01L21/321 ,  H01L21/304 ,  H01L21/28

    Abstract: A method for chemical mechanical polishing a component includes providing an oxide layer and forming at least one via through the oxide layer. A tungsten layer is formed within the via and over the oxide layer. A first chemical mechanical polishing step is carried out on a polishing pad using a first slurry having an oxidizing component and having a pH of approximately 2 to approximately 4 to remove the tungsten layer from over the oxide layer. A second chemical mechanical polishing step is carried out on the polishing pad using a second slurry having a pH of approximately 2 to approximately 4 to polish scratches out of the oxide layer.

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