DOUBLE WAVEFORM PATTERN STRUCTURE AND ITS FORMING METHOD

    公开(公告)号:JP2000021879A

    公开(公告)日:2000-01-21

    申请号:JP31315898

    申请日:1998-11-04

    Abstract: PROBLEM TO BE SOLVED: To avoid excessively polishing a metal line which would increase the resistance of metal lines and the parasitic capacitance between conductor lines by forming a double waveform pattern, using shallow dummy metal lines. SOLUTION: A thin adhesive layer 328 is formed in shallow metal line trenches and on the surface of an inter-metal dielectric layer 317 along the side walls and bottoms of second metal line trenches, vias, and third metal line trenches, a metal layer and adhesive layer 328 located higher than the inter-metal dielectric layer 317 are polished by the chemical-mechanical polishing to result in that metal layer filled in the second metal line trenches, third metal line trenches 326 and shallow dummy metal line trenches have the same height as the inter-metal dielectric layer 317, thereby avoiding excessively polishing the metal lines which would increase the resistance and hence the operation speed of the device not becomes low because of a small parasitic capacitance.

    Barrier layer for a semiconductor device

    公开(公告)号:GB2341484A

    公开(公告)日:2000-03-15

    申请号:GB9819997

    申请日:1998-09-14

    Abstract: A method for forming a barrier layer for a semiconductor device comprises the steps of first providing a semiconductor substrate 30 that has a conductive layer 31 already formed thereon. Then, a dielectric layer 32 such as an organic low-k dielectric layer is deposited over the conductive layer 31 and the semiconductor substrate 30. Next, an opening 33 is formed in the dielectric layer 32 exposing the conductive layer 31. Thereafter, a first barrier 34 layer is deposited into the opening 33 and the surrounding area. The first barrier layer 34 can be a silicon-containing layer or a doped silicon (doped-Si) layer formed by a plasma-enhanced chemical vapor deposition (PECVD) method, a low-pressure chemical vapor deposition (LPCVD) method, an electron beam evaporation method or a sputtering method. Finally, a second barrier layer 35 is formed over the first barrier layer 34, e.g. by CVD. The second barrier layer 35 can be a titanium/titanium nitride (Ti/TiN) layer, a tungsten nitride (WN) layer, a tantalum (Ta) layer or a tantalum nitride (TaN) layer. The opening is then filled with tungsten, copper or aluminium to form a via 36. The method can be applied to a damascene process.

    3.
    发明专利
    未知

    公开(公告)号:NL1010203C2

    公开(公告)日:2000-03-30

    申请号:NL1010203

    申请日:1998-09-28

    Abstract: A method for forming a barrier layer comprising the steps of first providing a semiconductor substrate that has a conductive layer already formed thereon. Then, a dielectric layer such as an organic low-k dielectric layer is deposited over the conductive layer and the semiconductor substrate. Next, an opening in formed in the dielectric layer exposing the conductive layer. Thereafter, a first barrier layer is deposited into the opening and the surrounding area. The first barrier layer can be a silicon-contained layer or a doped silicon (doped-Si) layer formed by a plasma-enhanced chemical vapor deposition (PECVD) method, a low-pressure chemical vapor deposition (LPCVD) method, an electron beam evaporation method or a sputtering method. Finally, a second barrier layer is formed over the first barrier layer. The second barrier layer can be a titanium/titanium nitride (Ti/TiN) layer, a tungsten nitride (WN) layer, a tantalum (Ta) layer or a tantalum nitride (TaN) layer.

    4.
    发明专利
    未知

    公开(公告)号:FR2774809B1

    公开(公告)日:2002-07-12

    申请号:FR9812017

    申请日:1998-09-25

    Abstract: A method for forming a barrier layer comprising the steps of first providing a semiconductor substrate that has a conductive layer already formed thereon. Then, a dielectric layer such as an organic low-k dielectric layer is deposited over the conductive layer and the semiconductor substrate. Next, an opening in formed in the dielectric layer exposing the conductive layer. Thereafter, a first barrier layer is deposited into the opening and the surrounding area. The first barrier layer can be a silicon-contained layer or a doped silicon (doped-Si) layer formed by a plasma-enhanced chemical vapor deposition (PECVD) method, a low-pressure chemical vapor deposition (LPCVD) method, an electron beam evaporation method or a sputtering method. Finally, a second barrier layer is formed over the first barrier layer. The second barrier layer can be a titanium/titanium nitride (Ti/TiN) layer, a tungsten nitride (WN) layer, a tantalum (Ta) layer or a tantalum nitride (TaN) layer.

    Barrier layer and fabricating method of the same

    公开(公告)号:GB2341484B

    公开(公告)日:2000-12-06

    申请号:GB9819997

    申请日:1998-09-14

    Abstract: A method for forming a barrier layer comprising the steps of first providing a semiconductor substrate that has a conductive layer already formed thereon. Then, a dielectric layer such as an organic low-k dielectric layer is deposited over the conductive layer and the semiconductor substrate. Next, an opening in formed in the dielectric layer exposing the conductive layer. Thereafter, a first barrier layer is deposited into the opening and the surrounding area. The first barrier layer can be a silicon-contained layer or a doped silicon (doped-Si) layer formed by a plasma-enhanced chemical vapor deposition (PECVD) method, a low-pressure chemical vapor deposition (LPCVD) method, an electron beam evaporation method or a sputtering method. Finally, a second barrier layer is formed over the first barrier layer. The second barrier layer can be a titanium/titanium nitride (Ti/TiN) layer, a tungsten nitride (WN) layer, a tantalum (Ta) layer or a tantalum nitride (TaN) layer.

    7.
    发明专利
    未知

    公开(公告)号:FR2774809A1

    公开(公告)日:1999-08-13

    申请号:FR9812017

    申请日:1998-09-25

    Abstract: A method for forming a barrier layer comprising the steps of first providing a semiconductor substrate that has a conductive layer already formed thereon. Then, a dielectric layer such as an organic low-k dielectric layer is deposited over the conductive layer and the semiconductor substrate. Next, an opening in formed in the dielectric layer exposing the conductive layer. Thereafter, a first barrier layer is deposited into the opening and the surrounding area. The first barrier layer can be a silicon-contained layer or a doped silicon (doped-Si) layer formed by a plasma-enhanced chemical vapor deposition (PECVD) method, a low-pressure chemical vapor deposition (LPCVD) method, an electron beam evaporation method or a sputtering method. Finally, a second barrier layer is formed over the first barrier layer. The second barrier layer can be a titanium/titanium nitride (Ti/TiN) layer, a tungsten nitride (WN) layer, a tantalum (Ta) layer or a tantalum nitride (TaN) layer.

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