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公开(公告)号：US09860984B2
公开(公告)日：2018-01-02
申请号：US15287718
申请日：2016-10-06
Applicant: Unimicron Technology Corp.
Inventor： Ming-Hao Wu , Shu-Sheng Chiang , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.
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公开(公告)号：US20170171975A1
公开(公告)日：2017-06-15
申请号：US15426062
申请日：2017-02-07
Applicant: Unimicron Technology Corp.
Inventor： Shu-Sheng Chiang , Ming-Hao Wu , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening connecting the cavity and exposing a portion of the first patterned circuit layer. A hole diameter of the opening is smaller than a hole diameter of cavity. A height difference is between an inner surface of the inner dielectric layer exposed by the cavity and a top surface of the first patterned circuit layer exposed by the opening.
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公开(公告)号：US20170171973A1
公开(公告)日：2017-06-15
申请号：US15287718
申请日：2016-10-06
Applicant: Unimicron Technology Corp.
Inventor： Ming-Hao Wu , Shu-Sheng Chiang , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.
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公开(公告)号：US20150305161A1
公开(公告)日：2015-10-22
申请号：US14255971
申请日：2014-04-18
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Wei-Ming Cheng
CPC classification number: H05K13/04 , H05K1/11 , H05K1/114 , H05K1/183 , H05K1/184 , H05K1/186 , H05K3/284 , H05K2201/09072 , H05K2201/10083 , H05K2201/10121 , H05K2201/10151
Abstract: An embedded component structure includes a wiring board, a component and an encapsulant. The wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer. The opening penetrates the wiring board and connects the front side and the reverse side of the wiring board. The interconnection layer is located on the front side of the wiring board and extends toward the opening. The component includes an active surface, a back side opposite to the active side, and a working area located on the active surface. The active surface is connected to the interconnection layer of the wiring board. The encapsulant is filled inside the opening and covers the component, which makes the working area of the component exposed. Besides, a method of the embedded component structure is also provided.
Abstract translation: 嵌入式组件结构包括布线板，部件和密封剂。 布线板具有前侧，与前侧相反的反面，开口和互连层。 开口穿过布线板并连接布线板的正面和背面。 互连层位于布线板的正面，朝向开口部延伸。 该部件包括活动表面，与活动侧相对的后侧以及位于活动表面上的工作区域。 有源表面连接到布线板的互连层。 密封剂填充在开口内部并覆盖部件，这使得部件的工作区域暴露。 此外，还提供了嵌入式组件结构的方法。
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公开(公告)号：US20150053462A1
公开(公告)日：2015-02-26
申请号：US14062912
申请日：2013-10-25
Applicant: Unimicron Technology Corp.
Inventor： Ming-Hao Wu , Wei-Ming Cheng , Hung-Lin Chang
IPC: H05K1/02
CPC classification number: H05K1/0206 , H01L21/568 , H01L24/19 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/16227 , H01L2224/73259 , H05K1/0203 , H05K1/0207 , H05K1/16 , H05K1/185 , H05K3/4602 , H05K2201/0187 , H05K2201/0195 , H05K2201/09527 , H05K2201/10219
Abstract: A wiring board structure adapted to carry a heat generating component is provided. The wiring board structure includes a core layer, an active cooler, a dielectric layer and a plurality of conductive vias. The core layer has a cavity penetrating through the core layer. The active cooler includes a cold surface and a hot surface. The active cooler is disposed in the cavity. The dielectric layer covers the core layer and fills a gap between the active cooler and the cavity. The heat-generating component is disposed on an outer surface of the dielectric layer. The conductive vias are disposed in the dielectric layer and connecting the cold surface and the outer surface to connect the heat-generating component and the active cooler. A wiring board structure having an active cooling via is also provided.
Abstract translation: 提供适于承载发热部件的布线板结构。 布线板结构包括芯层，有源冷却器，电介质层和多个导电通孔。 芯层具有穿透芯层的腔体。 主动冷却器包括冷表面和热表面。 有源冷却器设置在空腔中。 电介质层覆盖芯层并填充主动式冷却器和空腔之间的间隙。 发热部件设置在电介质层的外表面上。 导电通孔设置在电介质层中，并连接冷表面和外表面，以连接发热部件和主动冷却器。 还提供了具有主动冷却通路的布线板结构。
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Patent Agency Ranking
公开(公告)号：US20140225272A1
公开(公告)日：2014-08-14
申请号：US13762385
申请日：2013-02-08
Applicant: UNIMICRON TECHNOLOGY CORP.
Inventor： Yu-Chen Chuo , Wei-Ming Cheng
IPC: H01L23/552
CPC classification number: H01L23/552 , H01L23/3135 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/82039 , H01L2924/12042 , H01L2924/15153 , H01L2924/00
Abstract: An embedded electronic device package structure includes a core layer, an electronic device, a first dielectric layer, a second dielectric layer and conductive vias. The core layer has cavity, a first surface and a second surface opposite to the first surface. The electronic device is disposed in the cavity. The first dielectric layer disposed on the first surface is filled in part of the cavity and covers one side of the electronic device. The second dielectric layer disposed on the second surface is filled in the cavity, covers another side of the electronic device and connects the first dielectric layer. The first and the second dielectric layers fully cover the electronic device. The conductive vias are disposed around the surrounding of the electronic device and penetrates through the first and the second dielectric layer and the core layer. The conductive vias respectively connects the first and the second dielectric layer.
Abstract translation: 嵌入式电子器件封装结构包括芯层，电子器件，第一介电层，第二介电层和导电通孔。 芯层具有空腔，与第一表面相对的第一表面和第二表面。 电子设备设置在空腔中。 设置在第一表面上的第一介电层填充在空腔的一部分中并且覆盖电子设备的一侧。 设置在第二表面上的第二电介质层填充在空腔中，覆盖电子器件的另一侧并连接第一电介质层。 第一和第二介电层完全覆盖电子设备。 导电通孔围绕电子器件的周围设置并穿透第一和第二介电层和芯层。 导电通孔分别连接第一和第二介电层。
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公开(公告)号：US08803310B1
公开(公告)日：2014-08-12
申请号：US13762385
申请日：2013-02-08
Applicant: Unimicron Technology Corp.
Inventor： Yu-Chen Chuo , Wei-Ming Cheng
IPC: H01L23/12
CPC classification number: H01L23/552 , H01L23/3135 , H01L24/19 , H01L24/82 , H01L2224/04105 , H01L2224/82039 , H01L2924/12042 , H01L2924/15153 , H01L2924/00
Abstract: An embedded electronic device package structure includes a core layer, an electronic device, a first dielectric layer, a second dielectric layer and conductive vias. The core layer has cavity, a first surface and a second surface opposite to the first surface. The electronic device is disposed in the cavity. The first dielectric layer disposed on the first surface is filled in part of the cavity and covers one side of the electronic device. The second dielectric layer disposed on the second surface is filled in the cavity, covers another side of the electronic device and connects the first dielectric layer. The first and the second dielectric layers fully cover the electronic device. The conductive vias are disposed around the surrounding of the electronic device and penetrates through the first and the second dielectric layer and the core layer. The conductive vias respectively connects the first and the second dielectric layer.
Abstract translation: 嵌入式电子器件封装结构包括芯层，电子器件，第一介电层，第二介电层和导电通孔。 芯层具有空腔，与第一表面相对的第一表面和第二表面。 电子设备设置在空腔中。 设置在第一表面上的第一介电层填充在空腔的一部分中并且覆盖电子设备的一侧。 设置在第二表面上的第二电介质层填充在空腔中，覆盖电子器件的另一侧并连接第一电介质层。 第一和第二介电层完全覆盖电子设备。 导电通孔围绕电子器件的周围设置并穿透第一和第二介电层和芯层。 导电通孔分别连接第一和第二介电层。
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公开(公告)号：US10080284B2
公开(公告)日：2018-09-18
申请号：US15822222
申请日：2017-11-27
Applicant: Unimicron Technology Corp.
Inventor： Ming-Hao Wu , Shu-Sheng Chiang , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.
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公开(公告)号：US09832873B2
公开(公告)日：2017-11-28
申请号：US15426062
申请日：2017-02-07
Applicant: Unimicron Technology Corp.
Inventor： Shu-Sheng Chiang , Ming-Hao Wu , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening connecting the cavity and exposing a portion of the first patterned circuit layer. A hole diameter of the opening is smaller than a hole diameter of cavity. A height difference is between an inner surface of the inner dielectric layer exposed by the cavity and a top surface of the first patterned circuit layer exposed by the opening.
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公开(公告)号：US09609746B1
公开(公告)日：2017-03-28
申请号：US15011649
申请日：2016-01-31
Applicant: Unimicron Technology Corp.
Inventor： Shu-Sheng Chiang , Ming-Hao Wu , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening connecting the cavity and exposing a portion of the first patterned circuit layer. A hole diameter of the opening is smaller than a hole diameter of cavity. A height difference is between an inner surface of the inner dielectric layer exposed by the cavity and a top surface of the first patterned circuit layer exposed by the opening.
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