Submounts with Stud Protrusions for Semiconductor Packages

    公开(公告)号:US20250038056A1

    公开(公告)日:2025-01-30

    申请号:US18419128

    申请日:2024-01-22

    Abstract: Semiconductor packages are provided. In one example, the semiconductor package includes a submount. The semiconductor package further includes a recess in the submount. The recess includes a bottom surface defining a recess plane. The recess further includes at least one stud protrusion extending from the recess plane. The semiconductor package further includes a semiconductor die on the at least one stud protrusion.

    Die-Attach Fillet Height Reduction

    公开(公告)号:US20240421044A1

    公开(公告)日:2024-12-19

    申请号:US18336376

    申请日:2023-06-16

    Abstract: Semiconductor packages are provided. In one example, a semiconductor package includes a submount and a semiconductor die attached to the submount using a die-attach material. The semiconductor die includes a sidewall having at least one fillet reduction feature. The at least one fillet reduction feature is configured to limit a fillet height of the die-attach material along the sidewall of the semiconductor die.

    Semiconductor Die Bonding
    9.
    发明申请

    公开(公告)号:US20250105196A1

    公开(公告)日:2025-03-27

    申请号:US18475370

    申请日:2023-09-27

    Abstract: Die-attach materials for semiconductor device packages are provided. In one example, a semiconductor device package includes a submount. The semiconductor device package includes a semiconductor die comprising a wide bandgap semiconductor. The semiconductor device package includes a die-attach layer between the submount and the semiconductor die. The die-attach layer comprises gold (Au), tin (Sn), and cobalt (Co).

Patent Agency Ranking