公开(公告)号：US20240304507A1

公开(公告)日：2024-09-12

申请号：US18179036

申请日：2023-03-06

Applicant: Wolfspeed, Inc.

Inventor： Geza Dezsi ,  Yusheng Lin ,  Kuldeep Saxena

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L23/3107 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48175 ,  H01L2224/49111 ,  H01L2924/10272 ,  H01L2924/12032 ,  H01L2924/13091

Abstract: Power semiconductor packages are provided. In one example, a power semiconductor package may include a power semiconductor die. The power semiconductor package may include a housing having a first side and a second side opposing the first side. The power semiconductor package may include one or more electrical leads extending from the first side. The power semiconductor package may include one or more leadless surface mount type (SMT) connection structures on the second side.

公开(公告)号：US20250038056A1

公开(公告)日：2025-01-30

申请号：US18419128

申请日：2024-01-22

Applicant: Wolfspeed, Inc.

Inventor： Afshin Dadvand ,  Yusheng Lin

IPC: H01L23/13 ,  H01L23/00

Abstract: Semiconductor packages are provided. In one example, the semiconductor package includes a submount. The semiconductor package further includes a recess in the submount. The recess includes a bottom surface defining a recess plane. The recess further includes at least one stud protrusion extending from the recess plane. The semiconductor package further includes a semiconductor die on the at least one stud protrusion.

公开(公告)号：US20240243106A1

公开(公告)日：2024-07-18

申请号：US18456782

申请日：2023-08-28

Applicant: Wolfspeed, Inc.

Inventor： Daniel Ginn Richter ,  Yusheng Lin

IPC: H01L25/07 ,  H01L23/00 ,  H01L23/367 ,  H01L23/495 ,  H01L29/16

CPC classification number: H01L25/072 ,  H01L23/367 ,  H01L23/49537 ,  H01L23/49575 ,  H01L24/08 ,  H01L24/32 ,  H01L24/97 ,  H01L29/1608 ,  H01L2224/08238 ,  H01L2224/08258 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/97 ,  H01L2924/12032 ,  H01L2924/13091

Abstract: Semiconductor packages are provided. In one example, a power semiconductor package includes a first carrier submount, a second carrier submount, and a plurality of semiconductor die. Each semiconductor die of the plurality of semiconductor die has a first surface and an opposing second surface. Furthermore, for each semiconductor die of the plurality of semiconductor die, the first surface is directly coupled to the first carrier submount, and the second surface is directly coupled to the second carrier submount.

公开(公告)号：US20240243031A1

公开(公告)日：2024-07-18

申请号：US18154353

申请日：2023-01-13

Applicant: Wolfspeed, Inc.

Inventor： Yusheng Lin ,  Kuldeep Saxena ,  Devarajan Balaraman

IPC: H01L23/373 ,  H01L23/538 ,  H01L25/07 ,  H01L29/16 ,  H01L29/872

CPC classification number: H01L23/3735 ,  H01L23/5389 ,  H01L25/072 ,  H01L29/1608 ,  H01L29/872

Abstract: Power semiconductor packages are provided. In one example, a power semiconductor package may include a first carrier substrate. The first carrier substrate may include one or more conductive pads. The power semiconductor package may include a second carrier substrate. The second carrier substrate may include one or more conductive leads. The power semiconductor package may include a power semiconductor die having a first surface and an opposing second surface. The first surface of the power semiconductor die may be directly coupled to the first carrier substrate. The second surface of the power semiconductor die may be directly coupled to the second carrier substrate.