公开(公告)号：DE60117257T2

公开(公告)日：2006-07-27

申请号：DE60117257

申请日：2001-05-10

Applicant: XEROX CORP

Inventor： CHUA L ,  PEETERS ERIC ,  VAN SCHUYLENBERGH F ,  SMITH L

IPC: H01G5/01 ,  H01G17/00 ,  H01G5/16 ,  H01G7/00

Abstract: A new type of high-Q variable capacitor includes a substrate, a first electrically conductive layer fixed to the substrate, a dielectric layer fixed to a portion of the electrically conductive layer, and a second electrically conductive layer having an anchor portion and a free portion. The anchor portion is fixed to the dielectric layer and the free portion is initially fixed to the dielectric layer, but is released from the dielectric layer to become separated from the dielectric layer, and wherein an inherent stress profile in the second electrically conductive layer biases the free portion away from the dielectric layer. When a bias voltage is applied between the first electrically conductive layer and the second electrically conductive layer, electrostatic forces in the free portion bend the free portion towards the first electrically conductive layer, thereby increasing the capacitance of the capacitor.

公开(公告)号：DE60122343D1

公开(公告)日：2006-09-28

申请号：DE60122343

申请日：2001-05-10

Applicant: XEROX CORP

Inventor： CHUA L ,  LEMMI FRANCESCO ,  VAN SCHUYLENBERGH F ,  LU PING ,  FORK K ,  PEETERS ERIC ,  SUN DECAI ,  SMITH L ,  ROMANO T

IPC: G03C5/56 ,  H01F41/04 ,  G01R1/067 ,  G01R3/00 ,  G03C5/00 ,  G03C5/58 ,  G03F7/00 ,  H01F17/00 ,  H01F17/02 ,  H01F27/29 ,  H01L21/02 ,  H01L21/027 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/49 ,  H01L23/498 ,  H01L23/522 ,  H01L33/00 ,  H01R9/03 ,  H05K7/02

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate (14) plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member (61 a) having an intrinsic stress profile. The intrinsic stress profile biases a free portion (11) away from the substrate (14) forming a loop winding (142). An anchor portion (12) remains fixed to the substrate (14). The free portion end becomes a second anchor portion (61 c) which may be connected to the substrate (14) via soldering or plating. A series of individual coil structures (140) can be joined via their anchor portions to form inductors and transformers.

公开(公告)号：DE60122343T2

公开(公告)日：2006-12-14

申请号：DE60122343

申请日：2001-05-10

Applicant: XEROX CORP

Inventor： CHUA L ,  LEMMI FRANCESCO ,  VAN SCHUYLENBERGH F ,  LU PING ,  FORK K ,  PEETERS ERIC ,  SUN DECAI ,  SMITH L ,  ROMANO T

IPC: G03C5/56 ,  H01F41/04 ,  G01R1/067 ,  G01R3/00 ,  G03C5/00 ,  G03C5/58 ,  G03F7/00 ,  H01F17/00 ,  H01F17/02 ,  H01F27/29 ,  H01L21/02 ,  H01L21/027 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/49 ,  H01L23/498 ,  H01L23/522 ,  H01L33/00 ,  H01R9/03 ,  H05K7/02

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate (14) plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member (61 a) having an intrinsic stress profile. The intrinsic stress profile biases a free portion (11) away from the substrate (14) forming a loop winding (142). An anchor portion (12) remains fixed to the substrate (14). The free portion end becomes a second anchor portion (61 c) which may be connected to the substrate (14) via soldering or plating. A series of individual coil structures (140) can be joined via their anchor portions to form inductors and transformers.

公开(公告)号：DE60117257D1

公开(公告)日：2006-04-20

申请号：DE60117257

申请日：2001-05-10

Applicant: XEROX CORP

Inventor： CHUA L ,  PEETERS ERIC ,  VAN SCHUYLENBERGH F ,  SMITH L

IPC: H01G5/01 ,  H01G17/00 ,  H01G5/16 ,  H01G7/00

Abstract: A new type of high-Q variable capacitor includes a substrate, a first electrically conductive layer fixed to the substrate, a dielectric layer fixed to a portion of the electrically conductive layer, and a second electrically conductive layer having an anchor portion and a free portion. The anchor portion is fixed to the dielectric layer and the free portion is initially fixed to the dielectric layer, but is released from the dielectric layer to become separated from the dielectric layer, and wherein an inherent stress profile in the second electrically conductive layer biases the free portion away from the dielectric layer. When a bias voltage is applied between the first electrically conductive layer and the second electrically conductive layer, electrostatic forces in the free portion bend the free portion towards the first electrically conductive layer, thereby increasing the capacitance of the capacitor.