REDUCED POWER AND AREA EFFICIENT RECEIVER CIRCUITRY

    公开(公告)号:WO2022265704A1

    公开(公告)日:2022-12-22

    申请号:PCT/US2022/020477

    申请日:2022-03-16

    Applicant: XILINX, INC.

    Abstract: In one example, receiver circuitry for a communication system comprises signal processing circuitry configured to receive a data signal and generate a processed data signal, and error slicer circuitry. The error slicer circuitry is coupled to the output of the signal processing circuitry, and configured to receive the processed data signal. The error slicer circuitry comprises a first error slicer configured to receive a clock signal, and output a first error signal based on a first state of the clock signal and processed data signal. The first error slicer is further configured to output a second error signal based on a second state of the clock signal and the processed data signal.

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