公开(公告)号：EP3784621B1

公开(公告)日：2024-10-09

申请号：EP19724086.4

申请日：2019-04-25

IPC: B81B7/00 ,  G01L9/12 ,  G01L9/00

CPC classification number: G01L9/0072 ,  G01L9/125 ,  B81B7/0064 ,  B81B7/0019 ,  B81B2207/01220130101 ,  B81B2201/026420130101

公开(公告)号：EP4378881A1

公开(公告)日：2024-06-05

申请号：EP22210906.8

申请日：2022-12-01

Applicant: Infineon Technologies AG

Inventor： WASISTO, Hutomo Suryo ,  FÜLDNER, Marc ,  MAIER, Dominic ,  WIESBAUER, Andreas ,  ANZINGER, Sebastian

IPC: B81B7/00

CPC classification number: B81B7/0029 ,  B81B7/0061 ,  B81B2201/026420130101 ,  B81B2201/025720130101

Abstract: This disclosure concerns a method for manufacturing a MEMS pressure transducer chip (100) with a hybrid integrated environmental barrier structure (150), the method comprising a step of providing a substrate (110) comprising at least one membrane (120), a step of structuring a stepped recess structure (130) into the substrate (110), the stepped recess structure (130) comprising a first recess (131) having a first lateral width (W1) and an adjacent second recess (132) having a larger second lateral width (W2), wherein the stepped recess structure (130) extends between the membrane (120) and a substrate surface (142) opposite to the membrane (120), and a step of arranging an environmental barrier structure (150) inside the second recess (132). This disclosure also concerns a device being obtainable by said method.

公开(公告)号：EP4144687B1

公开(公告)日：2024-07-03

申请号：EP22190201.8

申请日：2022-08-12

IPC: B81B7/02 ,  B81C1/00

CPC classification number: B81C2201/011520130101 ,  B81B2201/023520130101 ,  B81B2201/024220130101 ,  B81B2201/026420130101 ,  B81C2201/017720130101 ,  B81B7/02 ,  B81C1/00158 ,  B81B2203/012720130101

公开(公告)号：EP4098606B1

公开(公告)日：2024-05-01

申请号：EP22175727.1

申请日：2022-05-27

IPC: B81B3/00

CPC classification number: B81B3/0027 ,  B81B2201/026420130101 ,  B81B2203/018120130101 ,  B81B2203/012720130101

公开(公告)号：EP3807209B1

公开(公告)日：2024-04-24

申请号：EP19780466.9

申请日：2019-09-17

IPC: B81B7/00

CPC classification number: B81B7/0096 ,  B81B2201/026420130101

公开(公告)号：EP3645452B1

公开(公告)日：2024-10-02

申请号：EP18731441.4

申请日：2018-06-14

IPC: B81B7/00 ,  G01L9/00

CPC classification number: B81B2203/016320130101 ,  B81B7/0048 ,  B81B2201/026420130101 ,  B81B2203/012720130101 ,  B81B2203/031520130101 ,  G01L9/0048

公开(公告)号：EP4431449A1

公开(公告)日：2024-09-18

申请号：EP23162600.3

申请日：2023-03-17

Applicant: TE Connectivity Solutions GmbH

Inventor： JENNI, Kaspar ,  BRUNNER, Ismael ,  ARNOLD, Thomas

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0048 ,  B81B2201/026420130101 ,  B81B2203/012720130101

Abstract: The invention relates to a semiconductor die (1), in particular for a MEMS-sensor device (3), the semiconductor die (1) having a top side (15), a bottom side (17) opposite to the top side (15), and at least one side surface (19) connecting the top side (15) and the bottom side (17), wherein the bottom side (17) and at least parts of the at least one side surface (17) are configured to be attached to a solid structure (5) via a die attach material (7). In order to define the fillet height (33) of a fillet (30) forming by the die attach material (7) on the side surface, at least the side surface (19) comprises at least one attachment control element (37) that is configured to define at least one attachment zone (39) of the side surface (19) to be contacted by the die attach material (7) and/or at least one exclusion zone (45) configured to not to be contacted by the die attach material (7).

公开(公告)号：EP3614115B1

公开(公告)日：2024-09-11

申请号：EP19196049.1

申请日：2015-04-02

IPC: G01L9/00 ,  B81C1/00 ,  B81B3/00

CPC classification number: G01L9/0045 ,  G01L9/0073 ,  B81B3/0089 ,  B81B2201/026420130101 ,  B81B2203/031520130101 ,  H01L2224/1120130101

公开(公告)号：EP4406914A1

公开(公告)日：2024-07-31

申请号：EP24153916.2

申请日：2024-01-25

Applicant: ROSEMOUNT AEROSPACE INC.

Inventor： BACKMAN, Roger Alan ,  FRINK, Sarah ,  POTASEK, David

IPC: B81C3/00 ,  G01L9/00

CPC classification number: B81C3/001 ,  B81B2201/026420130101 ,  B81B2203/031520130101 ,  B81C2201/01920130101 ,  G01L19/0654 ,  G01L9/0047

Abstract: A wafer die assembly includes a first wafer (102) having at least a central cavity (106) defined therein. The wafer die assembly includes a second wafer (112) mounted to the first wafer. At least one of the first or second wafers includes an etched pattern (104). The etched pattern including at least one peripheral cavity (108), and a raised area (110) raised relative to the peripheral cavity. A method of assembling a wafer die assembly includes etching a central cavity into a first wafer and etching a pattern into at least one of the first wafer or a second wafer. The first wafer and/or the second wafer includes a raised area raised relative to the peripheral cavity or the central cavity. The method includes bonding the second wafer to the first wafer.

公开(公告)号：EP3353112B1

公开(公告)日：2024-05-01

申请号：EP16775514.9

申请日：2016-09-19

IPC: B81C1/00 ,  H05K3/00 ,  B81B7/00

CPC classification number: B81B2203/016320130101 ,  B81C1/00142 ,  B81B2201/023520130101 ,  B81B2201/025720130101 ,  B81B2201/026420130101 ,  B81B2203/010920130101 ,  B81B2203/05320130101 ,  B81B2207/0720130101 ,  H05K1/162 ,  H05K2201/1008320130101 ,  H05K2201/1015120130101