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    DATA STORAGE DEVICE AND DATA PROCESSING SYSTEM INCLUDING THE SAME
    1.
    发明申请
    DATA STORAGE DEVICE AND DATA PROCESSING SYSTEM INCLUDING THE SAME 审中-公开
    数据存储设备和包括其的数据处理系统

    公开(公告)号：US20150149740A1

    公开(公告)日：2015-05-28

    申请号：US14161413

    申请日：2014-01-22

    Applicant: SK hynix Inc.

    Inventor： Dong Jae SHIN ,  Soo Nyun KIM

    IPC: G06F12/02 ,  G06F21/60

    CPC classification number: G06F12/023 ,  G06F12/0246 ,  G06F21/79 ,  G06F2212/1052 ,  G06F2212/7211 ,  Y02D10/13

    Abstract: A data processing system includes a data storage device including memory cells, which are erased to an erasure state and programmed to program states to store data, and a host device suitable for accessing the data, wherein the data storage device programs a first memory cell to a first state other than the erasure state to delete data of the first memory cell in response to a request of the host device.

    Abstract translation: 数据处理系统包括：数据存储装置，包括被擦除为擦除状态并被编程为编程状态以存储数据的存储器单元;以及适于访问数据的主机，其中数据存储装置将第一存储器单元编程为 除了所述擦除状态以响应于所述主机设备的请求来删除所述第一存储器单元的数据的第一状态。

    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
    2.
    发明申请
    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME 审中-公开

    公开(公告)号：US20190188101A1

    公开(公告)日：2019-06-20

    申请号：US16033849

    申请日：2018-07-12

    Applicant: SK hynix Inc.

    Inventor： Chi Eun KIM ,  Soo Nyun KIM

    IPC: G06F11/20

    CPC classification number: G06F11/2094 ,  G06F2201/82

    Abstract: A memory system includes: a nonvolatile memory device including a plurality of memory blocks and spare blocks; and a memory controller configured to control the nonvolatile memory device. The nonvolatile memory device may store spare information to any one block of the memory blocks or the spare blocks. When a bad block is detected from the memory blocks, the nonvolatile memory device replaces the bad block with any one of the spare blocks according to the spare information.

    MEMORY SYSTEM AND OPERATING METHOD THEREOF
    4.
    发明申请
    MEMORY SYSTEM AND OPERATING METHOD THEREOF 审中-公开
    存储系统及其操作方法

    公开(公告)号：US20160283395A1

    公开(公告)日：2016-09-29

    申请号：US14835369

    申请日：2015-08-25

    Applicant: SK hynix Inc.

    Inventor： In JUNG ,  Soo Nyun KIM

    IPC: G06F12/10 ,  G06F3/06

    CPC classification number: G06F3/0679 ,  G06F3/0613 ,  G06F3/0656 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7201 ,  G06F2212/7203

    Abstract: A memory system includes: a flash translation layer block suitable for receiving data from a host and converting a logic address into a physical address to store address information, during a write operation;a first buffer unit suitable for sequentially receiving the data from the flash translation layer; and a second buffer unit suitable for randomly receiving the data from the flash translation layer, wherein the flash translation layer block outputs data to only one of the first and second buffer units in a fast write mode during the write operation, and updates mapping information on the data stored in the one of the first and second buffer units after the fast write mode is terminated.

    Abstract translation: 第一缓冲单元，适于顺序地从闪存转换层接收数据; 以及适用于从闪存转换层中随机接收数据的第二缓冲器单元，其中闪存转换层块在写入操作期间以快速写入模式仅向第一和第二缓冲器单元之一输出数据，并且更新映射信息 在快速写入模式之后存储在第一和第二缓冲器单元之一中的数据被终止。

    DATA STORAGE DEVICE
    5.
    发明申请
    DATA STORAGE DEVICE 有权
    数据存储设备

    公开(公告)号：US20150113305A1

    公开(公告)日：2015-04-23

    申请号：US14143889

    申请日：2013-12-30

    Applicant: SK hynix Inc.

    Inventor： Dong Jae SHIN ,  Soo Nyun KIM

    IPC: G06F1/32

    CPC classification number: G06F3/0634 ,  G06F1/3237 ,  G06F1/3275 ,  G06F1/3287 ,  G06F1/3293 ,  G06F3/0604 ,  G06F3/0625 ,  G06F3/0679 ,  Y02D10/122 ,  Y02D10/14 ,  Y02D10/171

    Abstract: A data storage device includes a nonvolatile memory device; and a controller suitable for controlling an operation of the nonvolatile memory device based on a request from a host device, wherein the controller includes a first core activated in a normal mode and a second core activated in a standby mode.

    Abstract translation: 数据存储装置包括非易失性存储装置; 以及适于基于来自主机设备的请求来控制所述非易失性存储器件的操作的控制器，其中，所述控制器包括以正常模式激活的第一内核和在待机模式下激活的第二核。

    MEMORY SYSTEM AND OPERATING METHOD THEREOF
    6.
    发明申请
    MEMORY SYSTEM AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20190095139A1

    公开(公告)日：2019-03-28

    申请号：US16188896

    申请日：2018-11-13

    Applicant: SK hynix Inc.

    Inventor： In JUNG ,  Soo Nyun KIM

    IPC: G06F3/06 ,  G06F12/02

    Abstract: A memory system includes: a flash translation layer block suitable for receiving data from a host and converting a logic address into a physical address to store address information, during a write operation;a first buffer unit suitable for sequentially receiving the data from the flash translation layer; and a second buffer unit suitable for randomly receiving the data from the flash translation layer, wherein the flash translation layer block outputs data to only one of the first and second buffer units in a fast write mode during the write operation, and updates mapping information on the data stored in the one of the first and second buffer units after the fast write mode is terminated.

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