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公开(公告)号：US08767408B2
公开(公告)日：2014-07-01
申请号：US13592037
申请日：2012-08-22
Applicant: Shawn X. Arnold , Douglas P. Kidd , Sean A. Mayo , Scott P. Mullins , Dennis R. Pyper , Jeffrey M. Thoma , Kenyu Tojima
Inventor： Shawn X. Arnold , Douglas P. Kidd , Sean A. Mayo , Scott P. Mullins , Dennis R. Pyper , Jeffrey M. Thoma , Kenyu Tojima
IPC: H05K1/18
CPC classification number: G06F1/183 , H01L2224/16227 , H01L2924/19106 , H05K1/0231 , H05K1/141 , H05K1/181 , H05K1/185 , H05K3/403 , H05K2201/10378 , H05K2201/10515 , H05K2201/1053 , H05K2201/10545 , Y02P70/611 , Y10T29/4913
Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to an interposer with an encapsulated third layer of components disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can couple signals between the components on the first and second layers.
Abstract translation: 公开了堆叠的组件阵列。 在一个实施例中，第一和第二层组件通过电介质和机械耦合到具有设置在第一层和第二层之间的被封装的第三层组件的中介层。 第一层可以被配置为将堆叠的阵列附接到主机印刷电路板。 插入器可以在第一层和第二层之间的组件之间耦合信号。
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公开(公告)号：US08942002B2
公开(公告)日：2015-01-27
申请号：US13595976
申请日：2012-08-27
Applicant: Shawn X. Arnold , Douglas P. Kidd , Sean A. Mayo , Scott P. Mullins , Dennis R. Pyper , Jeffrey M. Thoma , Kenyu Tojima
Inventor： Shawn X. Arnold , Douglas P. Kidd , Sean A. Mayo , Scott P. Mullins , Dennis R. Pyper , Jeffrey M. Thoma , Kenyu Tojima
IPC: H05K1/18
CPC classification number: G06F1/183 , H01L2224/16227 , H01L2924/19106 , H05K1/0231 , H05K1/141 , H05K1/181 , H05K1/185 , H05K3/403 , H05K2201/10378 , H05K2201/10515 , H05K2201/1053 , H05K2201/10545 , Y02P70/611 , Y10T29/4913
Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to a thin interposer disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can insulate the components from one another and also couple signals between the components on the first and second layers. In one embodiment, the components in the first and second layers are passive components.
Abstract translation: 公开了堆叠的组件阵列。 在一个实施例中，第一和第二层部件电气和机械耦合到设置在第一和第二层之间的薄插入件。 第一层可以被配置为将堆叠的阵列附接到主机印刷电路板。 插入器可以将组件彼此绝缘，并且还可以在第一层和第二层之间的组件之间耦合信号。 在一个实施例中，第一和第二层中的部件是无源部件。
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Patent Agency Ranking
公开(公告)号：US20140008110A1
公开(公告)日：2014-01-09
申请号：US13541427
申请日：2012-07-03
Applicant: Shawn X. Arnold , Dennis R. Pyper
Inventor： Shawn X. Arnold , Dennis R. Pyper
CPC classification number: H05K3/462 , H05K3/4623 , H05K2201/10234 , Y10T156/10 , Y10T156/1002
Abstract: The described embodiment relates generally to the field of PCB fabrication. More specifically conductive spheres are used in a bonding sheet to enable inter-layer communication in a multi-layer printed circuit board (PCB). The conductive spheres in the bonding sheet can be used in place of or in conjunction with conventional electroplated vias. This allows the following advantages in multi-layer PCB fabrication: dielectric substrate layers made of varying types of material; PCBs with higher resilience to stress and shock; and PCBs that are more flexible.
Abstract translation: 所描述的实施例一般涉及PCB制造领域。 在粘合片中使用更具体的导电性球体以实现多层印刷电路板（PCB）中的层间连通。 粘合片中的导电球可用于代替常规电镀通孔或与常规电镀通孔结合使用。 这允许在多层PCB制造中具有以下优点：由不同类型的材料制成的电介质基底层; 对应力和冲击具有较高弹性的PCB; 和PCB更灵活。
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公开(公告)号：US20130223041A1
公开(公告)日：2013-08-29
申请号：US13593075
申请日：2012-08-23
Applicant: Shawn X. Arnold , Scott P. Mullins , Jeffrey M. Thoma , Ram Chandhrasekhar
Inventor： Shawn X. Arnold , Scott P. Mullins , Jeffrey M. Thoma , Ram Chandhrasekhar
CPC classification number: H01L23/552 , H01L23/3107 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2924/19105 , Y10T29/49204
Abstract: A low profile, space efficient circuit shield is disclosed. The shield includes top and bottom metal layers disposed on the top of and below an integrated circuit. In one embodiment the shield can include edge plating arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In another embodiment, the shield can include through vias arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In yet another embodiment, passive components can be disposed adjacent to the integrated circuit within the shield.
Abstract translation: 公开了一种低调，高效率的电路屏蔽。 屏蔽包括设置在集成电路顶部和下方的顶部和底部金属层。 在一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的边缘电镀。 在另一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的通孔。 在另一个实施例中，无源部件可以被布置成与屏蔽件内的集成电路相邻。
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公开(公告)号：US09030841B2
公开(公告)日：2015-05-12
申请号：US13593075
申请日：2012-08-23
Applicant: Shawn X. Arnold , Scott P. Mullins , Jeffrey M. Thoma , Ramamurthy Chandhrasekhar
Inventor： Shawn X. Arnold , Scott P. Mullins , Jeffrey M. Thoma , Ramamurthy Chandhrasekhar
IPC: H05K9/00 , H01L23/552 , H01L23/31
CPC classification number: H01L23/552 , H01L23/3107 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2924/19105 , Y10T29/49204
Abstract: A low profile, space efficient circuit shield is disclosed. The shield includes top and bottom metal layers disposed on the top of and below an integrated circuit. In one embodiment the shield can include edge plating arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In another embodiment, the shield can include through vias arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In yet another embodiment, passive components can be disposed adjacent to the integrated circuit within the shield.
Abstract translation: 公开了一种低调，高效率的电路屏蔽。 屏蔽包括设置在集成电路顶部和下方的顶部和底部金属层。 在一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的边缘电镀。 在另一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的通孔。 在另一个实施例中，无源部件可以被布置成与屏蔽件内的集成电路相邻。
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6.发明授权Multilayer laminated structure for plug and connector with spring finger interconnecting feature 有权用于插头和连接器的多层层压结构，具有弹簧指互连功能公开(公告)号：US08941013B2
公开(公告)日：2015-01-27
申请号：US13598503
申请日：2012-08-29
Applicant: Shawn X. Arnold
Inventor： Shawn X. Arnold
CPC classification number: H01R12/714 , H01R12/732 , H05K1/117 , H05K1/142 , H05K3/365 , H05K2201/0311 , H05K2201/09163 , H05K2201/1034 , H05K2201/1059 , Y10T156/10 , Y10T156/1052
Abstract: A spring finger interconnection system can include a plug and a receptacle. In one embodiment, the plug can include spring finger contacts configured to carry electrical signals. The receptacle can include a cavity to receive the plug and the cavity can be constructed with printed circuit board fabrication techniques. In one embodiment, the cavity can be formed, at least in part, in a pre-impregnation layer and a first and a second layer can be disposed above and below the pre-impregnation layer to further form the cavity. In one embodiment, contacts can be arranged on the first layer to contact the spring fingers when the plug is inserted into the cavity. In another embodiment, contacts can be arranged on both the first and the second layers. In yet another embodiment, the cavity can be shaped to aid in contact-to-spring finger alignment when the plug is inserted in the cavity.
Abstract translation: 弹簧手指互连系统可以包括插头和插座。 在一个实施例中，插头可以包括配置成承载电信号的弹簧爪触点。 容器可以包括用于接收插头的空腔，并且空腔可以由印刷电路板制造技术构成。 在一个实施例中，空腔可以至少部分地形成在预浸渍层中，并且可以在预浸渍层的上方和下方设置第一和第二层以进一步形成空腔。 在一个实施例中，当插头插入空腔时，触头可布置在第一层上以接触弹簧指。 在另一个实施例中，触点可以布置在第一和第二层上。 在另一个实施例中，当插头插入空腔时，空腔可被成形为有助于接触弹簧对准。
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7.发明授权Small form factor stacked electrical passive devices that reduce the distance to the ground plane 有权小尺寸堆叠式电气无源器件减少距离地平面的距离公开(公告)号：US09215807B2
公开(公告)日：2015-12-15
申请号：US13626858
申请日：2012-09-25
Applicant: Shawn X. Arnold , Jeffrey M. Thoma
Inventor： Shawn X. Arnold , Jeffrey M. Thoma
CPC classification number: H05K1/141 , H05K1/0231 , H05K1/111 , H05K3/366 , H05K2201/049 , H05K2201/10045 , H05K2201/10636 , Y02P70/611 , Y10T29/49133
Abstract: The described embodiments relate generally to electronic components and more specifically to a capacitor array that can increase component density on a printed circuit board and reduce a distance to a ground plane. An array of capacitors can be formed by coupling a group of capacitors on their sides interspersed with interposer boards. The resulting configuration can increase component density and reduce an amount of resistance and effective series inductance between a set of power decoupling capacitors and an integrated circuit.
Abstract translation: 所描述的实施例一般涉及电子部件，更具体地涉及可以增加印刷电路板上的部件密度并减小到接地平面的距离的电容器阵列。 一组电容器可以通过将一组电容器连接在插入有插入板的侧面上形成。 所得到的配置可以增加组件密度并减少一组功率去耦电容器和集成电路之间的电阻和有效串联电感量。
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