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    PCB MANUFACTURING PROCESS AND STRUCTURE
    3.
    发明申请
    PCB MANUFACTURING PROCESS AND STRUCTURE 审中-公开
    PCB制造工艺和结构

    公开(公告)号：US20140008110A1

    公开(公告)日：2014-01-09

    申请号：US13541427

    申请日：2012-07-03

    Applicant: Shawn X. Arnold ,  Dennis R. Pyper

    Inventor： Shawn X. Arnold ,  Dennis R. Pyper

    IPC: H05K3/46 ,  H05K1/09 ,  H05K1/11

    CPC classification number: H05K3/462 ,  H05K3/4623 ,  H05K2201/10234 ,  Y10T156/10 ,  Y10T156/1002

    Abstract: The described embodiment relates generally to the field of PCB fabrication. More specifically conductive spheres are used in a bonding sheet to enable inter-layer communication in a multi-layer printed circuit board (PCB). The conductive spheres in the bonding sheet can be used in place of or in conjunction with conventional electroplated vias. This allows the following advantages in multi-layer PCB fabrication: dielectric substrate layers made of varying types of material; PCBs with higher resilience to stress and shock; and PCBs that are more flexible.

    Abstract translation: 所描述的实施例一般涉及PCB制造领域。 在粘合片中使用更具体的导电性球体以实现多层印刷电路板（PCB）中的层间连通。 粘合片中的导电球可用于代替常规电镀通孔或与常规电镀通孔结合使用。 这允许在多层PCB制造中具有以下优点：由不同类型的材料制成的电介质基底层; 对应力和冲击具有较高弹性的PCB; 和PCB更灵活。

    LOW PROFILE, SPACE EFFICIENT CIRCUIT SHIELDS
    4.
    发明申请
    LOW PROFILE, SPACE EFFICIENT CIRCUIT SHIELDS 有权
    低剖面，空间有效的电路板

    公开(公告)号：US20130223041A1

    公开(公告)日：2013-08-29

    申请号：US13593075

    申请日：2012-08-23

    Applicant: Shawn X. Arnold ,  Scott P. Mullins ,  Jeffrey M. Thoma ,  Ram Chandhrasekhar

    Inventor： Shawn X. Arnold ,  Scott P. Mullins ,  Jeffrey M. Thoma ,  Ram Chandhrasekhar

    IPC: H05K9/00 ,  H01R43/00

    CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/19105 ,  Y10T29/49204

    Abstract: A low profile, space efficient circuit shield is disclosed. The shield includes top and bottom metal layers disposed on the top of and below an integrated circuit. In one embodiment the shield can include edge plating arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In another embodiment, the shield can include through vias arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In yet another embodiment, passive components can be disposed adjacent to the integrated circuit within the shield.

    Abstract translation: 公开了一种低调，高效率的电路屏蔽。 屏蔽包括设置在集成电路顶部和下方的顶部和底部金属层。 在一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的边缘电镀。 在另一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的通孔。 在另一个实施例中，无源部件可以被布置成与屏蔽件内的集成电路相邻。

    Low profile, space efficient circuit shields
    5.
    发明授权
    Low profile, space efficient circuit shields 有权
    薄型，空间高效的电路屏蔽

    公开(公告)号：US09030841B2

    公开(公告)日：2015-05-12

    申请号：US13593075

    申请日：2012-08-23

    Applicant: Shawn X. Arnold ,  Scott P. Mullins ,  Jeffrey M. Thoma ,  Ramamurthy Chandhrasekhar

    Inventor： Shawn X. Arnold ,  Scott P. Mullins ,  Jeffrey M. Thoma ,  Ramamurthy Chandhrasekhar

    IPC: H05K9/00 ,  H01L23/552 ,  H01L23/31

    CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/19105 ,  Y10T29/49204

    Abstract: A low profile, space efficient circuit shield is disclosed. The shield includes top and bottom metal layers disposed on the top of and below an integrated circuit. In one embodiment the shield can include edge plating arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In another embodiment, the shield can include through vias arranged to encircle the edges of the integrated circuit and couple the top and bottom metal layers together. In yet another embodiment, passive components can be disposed adjacent to the integrated circuit within the shield.

    Abstract translation: 公开了一种低调，高效率的电路屏蔽。 屏蔽包括设置在集成电路顶部和下方的顶部和底部金属层。 在一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的边缘电镀。 在另一个实施例中，屏蔽件可以包括布置成环绕集成电路的边缘并将顶部和底部金属层耦合在一起的通孔。 在另一个实施例中，无源部件可以被布置成与屏蔽件内的集成电路相邻。

    Multilayer laminated structure for plug and connector with spring finger interconnecting feature
    6.
    发明授权
    Multilayer laminated structure for plug and connector with spring finger interconnecting feature 有权
    用于插头和连接器的多层层压结构，具有弹簧指互连功能

    公开(公告)号：US08941013B2

    公开(公告)日：2015-01-27

    申请号：US13598503

    申请日：2012-08-29

    Applicant: Shawn X. Arnold

    Inventor： Shawn X. Arnold

    IPC: H01R13/62 ,  H05K1/16

    CPC classification number: H01R12/714 ,  H01R12/732 ,  H05K1/117 ,  H05K1/142 ,  H05K3/365 ,  H05K2201/0311 ,  H05K2201/09163 ,  H05K2201/1034 ,  H05K2201/1059 ,  Y10T156/10 ,  Y10T156/1052

    Abstract: A spring finger interconnection system can include a plug and a receptacle. In one embodiment, the plug can include spring finger contacts configured to carry electrical signals. The receptacle can include a cavity to receive the plug and the cavity can be constructed with printed circuit board fabrication techniques. In one embodiment, the cavity can be formed, at least in part, in a pre-impregnation layer and a first and a second layer can be disposed above and below the pre-impregnation layer to further form the cavity. In one embodiment, contacts can be arranged on the first layer to contact the spring fingers when the plug is inserted into the cavity. In another embodiment, contacts can be arranged on both the first and the second layers. In yet another embodiment, the cavity can be shaped to aid in contact-to-spring finger alignment when the plug is inserted in the cavity.

    Abstract translation: 弹簧手指互连系统可以包括插头和插座。 在一个实施例中，插头可以包括配置成承载电信号的弹簧爪触点。 容器可以包括用于接收插头的空腔，并且空腔可以由印刷电路板制造技术构成。 在一个实施例中，空腔可以至少部分地形成在预浸渍层中，并且可以在预浸渍层的上方和下方设置第一和第二层以进一步形成空腔。 在一个实施例中，当插头插入空腔时，触头可布置在第一层上以接触弹簧指。 在另一个实施例中，触点可以布置在第一和第二层上。 在另一个实施例中，当插头插入空腔时，空腔可被成形为有助于接触弹簧对准。

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