公开(公告)号：US09463976B2

公开(公告)日：2016-10-11

申请号：US14317101

申请日：2014-06-27

Applicant: Robert F. Steimle ,  Paul M. Winebarger

Inventor： Robert F. Steimle ,  Paul M. Winebarger

IPC: B81C1/00

CPC classification number: B81C1/00238 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81C1/00246 ,  B81C1/00253

Abstract: A method and apparatus are described for fabricating a high aspect ratio MEMS sensor device having multiple vertically-stacked inertial transducer elements (101B, 110D) formed in different layers of a multi-layer semiconductor structure (100) and one or more cap devices (200, 300) bonded to the multi-layer semiconductor structure (100) to protect any exposed inertial transducer element from ambient environmental conditions.

Abstract translation: 描述了一种用于制造具有形成在多层半导体结构（100）和一个或多个盖装置（200）的不同层中的多个垂直堆叠的惯性换能器元件（101B，110D）的高纵横比MEMS传感器装置的方法和装置 ，300），其结合到所述多层半导体结构（100）以保护任何暴露的惯性换能器元件免受周围环境条件的影响。

公开(公告)号：US20160289060A1

公开(公告)日：2016-10-06

申请号：US15068511

申请日：2016-03-11

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Akira FUJIMOTO ,  Naofumi NAKAMURA ,  Tamio IKEHASHI

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0072 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0264 ,  B81C1/00365 ,  B81C2201/0167 ,  B81C2201/0169 ,  G01P15/0802 ,  G01P15/125

Abstract: According to one embodiment, a method of manufacturing a device is provided. A amorphous metal layer is formed. A metal layer containing metal and having a crystal plane oriented to a predetermined plane is formed on the amorphous metal layer. A first layer containing semiconductor including silicon, and metal identical to the metal contained in the metal layer is formed on the metal layer. The first layer is changed to a second layer containing a compound of the semiconductor and the metal, the compound having a crystal plane oriented to the predetermined plane. A third layer containing polycrystalline silicon-germanium and having a crystal plane oriented to the predetermined plane is formed on the second layer.

Abstract translation: 根据一个实施例，提供了一种制造装置的方法。 形成非晶金属层。 在非晶金属层上形成含有金属并具有取向为规定面的晶面的金属层。 包含硅的第一层和包含在金属层中的金属相同的金属形成在金属层上。 将第一层改变为包含半导体和金属的化合物的第二层，该化合物具有定向到预定平面的晶体面。 在第二层上形成含有多晶硅锗并且具有定向到预定平面的晶体面的第三层。

公开(公告)号：US09455353B2

公开(公告)日：2016-09-27

申请号：US13563626

申请日：2012-07-31

Applicant: Po-Jui Chen ,  Gary Yama ,  Matthieu Liger ,  Andrew Graham

Inventor： Po-Jui Chen ,  Gary Yama ,  Matthieu Liger ,  Andrew Graham

IPC: H01L29/84 ,  H01L29/66 ,  B81C1/00 ,  G01C19/5783 ,  G01P15/08 ,  G01P15/18

CPC classification number: H01L29/84 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2207/015 ,  B81C1/0023 ,  B81C2201/0197 ,  B81C2203/0136 ,  B81C2203/0771 ,  G01C19/5783 ,  G01P15/0802 ,  G01P15/18 ,  H01L29/66007

Abstract: A device with multiple encapsulated functional layers, includes a substrate, a first functional layer positioned above a top surface of the substrate, the functional layer including a first device portion, a first encapsulating layer encapsulating the first functional layer, a second functional layer positioned above the first encapsulating layer, the second functional layer including a second device portion, and a second encapsulating layer encapsulating the second functional layer.

Abstract translation: 具有多个封装的功能层的器件包括衬底，位于衬底顶表面上方的第一功能层，功能层包括第一器件部分，封装第一功能层的第一封装层，位于第一功能层上方的第二功能层 第一封装层，第二功能层包括第二器件部分和封装第二功能层的第二封装层。

公开(公告)号：US20160272483A1

公开(公告)日：2016-09-22

申请号：US15169368

申请日：2016-05-31

Applicant: Seiko Epson Corporation

Inventor： Satoru TANAKA

IPC: B81B3/00

CPC classification number: B81B3/0072 ,  B81B3/0018 ,  B81B7/007 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/0118 ,  B81B2207/097 ,  B81C1/00158 ,  B81C2203/0109 ,  G01C19/5656 ,  G01L9/0042 ,  H01L21/76205 ,  H01L23/528 ,  H01L24/02 ,  H01L2224/0212 ,  H01L2924/15 ,  H01L2924/351

Abstract: A functional element includes a substrate which is provided with a concave section; a stationary section connected to a wall section that defines the concave section of the substrate; an elastic section which extends from the stationary section and is capable of stretching and contracting in a first axis direction; a movable body connected to the elastic section; a movable electrode section which extends from the movable body. The concave section includes a cutout section which is provided on the wall section. The stationary section includes an overlap section which is spaced with the substrate, and overlaps the concave section when seen in a plan view. At least a portion of the overlap section overlaps the cutout section when seen in the plan view, and the elastic section extends from the overlap section.

Abstract translation: 功能元件包括设置有凹部的基板; 连接到限定所述基板的凹部的壁部的固定部; 弹性部分，其从固定部分延伸并且能够在第一轴线方向上伸缩; 连接到所述弹性部分的可移动体; 从可动体延伸的可动电极部。 凹部包括设置在壁部上的切口部。 固定部分包括与基板间隔开的重叠部分，并且在平面图中看时与凹部重叠。 当在平面图中看时，重叠部分的至少一部分与切口部分重叠，并且弹性部分从重叠部分延伸。

公开(公告)号：US09434602B2

公开(公告)日：2016-09-06

申请号：US14446910

申请日：2014-07-30

Applicant: Robert F. Steimle ,  Ruben B. Montez

Inventor： Robert F. Steimle ,  Ruben B. Montez

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/001 ,  B81B2201/0235 ,  B81B2203/0181

Abstract: Certain microelectromechanical systems (MEMS) devices, and methods of creating them, are disclosed. The method may include forming a structural layer over a substrate; forming a mask layer over the structural layer, wherein the mask layer is formed with a material selective to an etching process; forming a plurality of nanoclusters on the mask layer; and etching the structural layer using at least the etching process.

Abstract translation: 公开了某些微机电系统（MEMS）设备及其创建方法。 该方法可以包括在衬底上形成结构层; 在所述结构层上形成掩模层，其中所述掩模层由对蚀刻工艺选择的材料形成; 在掩模层上形成多个纳米团簇; 并使用至少蚀刻工艺蚀刻结构层。

公开(公告)号：US20160229690A1

公开(公告)日：2016-08-11

申请号：US15132965

申请日：2016-04-19

Applicant: ROHM CO., LTD.

Inventor： Yuichi NAKAO ,  Yasuhiro FUWA

IPC: B81B7/00

CPC classification number: B81B7/0074 ,  B81B2201/0235 ,  B81B2203/0315 ,  H01L23/13 ,  H01L23/147 ,  H01L23/24 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49579 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/157 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate that is made of a semiconductor material and has a main surface formed with a recess. The semiconductor device also includes a wiring layer formed on the substrate, an electronic element housed in the recess, and a sealing resin covering at least a part of the electronic element.

Abstract translation: 半导体器件包括由半导体材料制成并具有形成有凹部的主表面的衬底。 半导体器件还包括形成在基板上的布线层，容纳在凹部中的电子元件以及覆盖电子元件的至少一部分的密封树脂。

公开(公告)号：US20160229687A1

公开(公告)日：2016-08-11

申请号：US15008371

申请日：2016-01-27

Applicant: XINTEC INC.

Inventor： Ying-Nan WEN ,  Ho-Yin YIU ,  Chien-Hung LIU

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00293 ,  B81B7/02 ,  B81B2201/0235 ,  B81B2201/0242

Abstract: A chip package included a chip, a first though hole, a laser stop structure, a first isolation layer, a second though hole and a conductive layer. The first though hole is extended from the second surface to the first surface of the chip to expose a conductive pad, and the laser stop structure is disposed on the conductive pad exposed by the first through hole, which an upper surface of the laser stop structure is above the second surface. The first isolation layer covers the second surface and the laser stop structure, and the first isolation layer has a third surface opposite to the second surface. The second though hole is extended from the third surface to the second surface to expose the laser stop structure, and a conductive layer is on the third surface and extended into the second though hole to contact the laser stop structure.

Abstract translation: 芯片封装包括芯片，第一通孔，激光停止结构，第一隔离层，第二通孔和导电层。 第一通孔从芯片的第二表面延伸到第一表面以暴露导电焊盘，并且激光停止结构设置在由第一通孔暴露的导电焊盘上，激光停止结构的上表面 在第二个表面之上。 第一隔离层覆盖第二表面和激光停止结构，第一隔离层具有与第二表面相对的第三表面。 第二通孔从第三表面延伸到第二表面以暴露激光停止结构，并且导电层在第三表面上并延伸到第二通孔中以接触激光停止结构。

公开(公告)号：US20160229685A1

公开(公告)日：2016-08-11

申请号：US15024711

申请日：2014-09-19

Applicant: MOTION ENGINE INC.

Inventor： Robert Mark Boysel

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/0264 ,  B81B2207/012 ,  B81B2207/015 ,  B81B2207/07 ,  B81B2207/095 ,  B81C1/00238 ,  B81C2201/013 ,  B81C2203/0792

Abstract: A MEMS and a method of manufacturing MEMS components are provided. The method includes providing a MEMS wafer stack including a top cap wafer, a MEMS wafer and optionally a bottom cap wafer. The MEMS wafer has MEMS structures patterned therein. The MEMS wafer and the cap wafers include insulated conducting channels forming insulated conducting pathways extending within the wafer stack. The wafer stack is bonded to an integrated circuit wafer having electrical contacts on its top side, such that the insulated conducting pathways extend from the integrated circuit wafer to the outer side of the top cap wafer. Electrical contacts on the outer side of the top cap wafer are formed and are electrically connected to the respective insulated conducting channels of the top cap wafer. The MEMS wafer stack and the integrated circuit wafer are then diced into components having respective sealed chambers and MEMS structures housed therein.

Abstract translation: 提供MEMS和制造MEMS部件的方法。 该方法包括提供包括顶盖晶片，MEMS晶片和任选的底盖晶片的MEMS晶片叠层。 MEMS晶片具有图案化的MEMS结构。 MEMS晶片和盖晶片包括形成在晶片堆叠内延伸的绝缘导电路径的绝缘导电沟道。 晶片堆叠结合到在其顶侧上具有电触点的集成电路晶片，使得绝缘导电路径从集成电路晶片延伸到顶盖晶片的外侧。 形成顶盖晶片外侧的电触点，并与顶盖晶片的相应的绝缘导电通道电连接。 然后将MEMS晶片堆叠和集成电路晶片切割成具有容纳在其中的相应密封室和MEMS结构的部件。

公开(公告)号：US09403677B2

公开(公告)日：2016-08-02

申请号：US14631064

申请日：2015-02-25

Applicant: Elmos Semiconductor AG

Inventor： Michael Doelle

IPC: B81B7/02 ,  B81C1/00 ,  G01L9/00 ,  B81B3/00 ,  H01L29/49 ,  H01L29/84

CPC classification number: B81C1/00158 ,  B81B3/0018 ,  B81B3/0021 ,  B81B3/007 ,  B81B3/0072 ,  B81B3/0081 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00626 ,  B81C99/0035 ,  B81C2201/019 ,  G01L9/0047 ,  H01L29/4916 ,  H01L29/84

Abstract: The micro-electromechanical semiconductor component is provided with a semiconductor substrate (4, 5), a reversibly deformable bending element (8a) made of semiconductor material, and at least one transistor that is sensitive to mechanical stresses, said transistor being designed as an integrated component in the bending element (8a). The transistor is arranged in an implanted active region pan (78a) that is made of a semiconductor material of a first conducting type and is introduced in the bending element (8a). Two mutually spaced, implanted drain and source regions (79, 80) made of a semiconductor material of a second conducting type are designed in the active region pan (78a), a channel region extending between said two regions. Implanted feed lines made of a semiconductor material of the second conducting type lead to the drain and source regions (79, 80). The upper face of the active region pan (78a) is covered by a gate oxide (81a). In the area of the channel region, a gate electrode (81) made of polysilicon is located on the gate oxide (81a), a feed line likewise made of polysilicon leading to said gate electrode.

Abstract translation: 微机电半导体部件设置有半导体基板（4,5），由半导体材料制成的可逆变形的弯曲元件（8a）和至少一个对机械应力敏感的晶体管，所述晶体管被设计为集成 弯曲元件（8a）中的部件。 晶体管布置在由第一导电类型的半导体材料制成并被引入到弯曲元件（8a）中的注入有源区域盘（78a）中。 在有源区域盘（78a）中设置两个相互间隔的由第二导电类型的半导体材料制成的漏极和源极区域（79,80），在所述两个区域之间延伸的沟道区域。 由第二导电类型的半导体材料制成的注入馈电线导向漏极和源极区域（79,80）。 有源区域盘（78a）的上表面被栅极氧化物（81a）覆盖。 在沟道区域中，由多晶硅制成的栅极（81）位于栅极氧化物（81a）上，同样由通向所述栅电极的多晶硅制成的馈电线。

公开(公告)号：US20160214854A1

公开(公告)日：2016-07-28

申请号：US15003099

申请日：2016-01-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jong Woon KIM ,  Tae Yoon KIM ,  Dae Hun JEONG

IPC: B81B3/00

CPC classification number: B81B3/0051 ,  B81B2201/0235 ,  B81B2203/053 ,  B81B2203/058

Abstract: A microelectromechanical systems (MEMS) sensor includes a first layer on which a first displacement limiting part and a second displacement limiting part are formed; a third layer on which a mass body part and a support part are formed; and a second layer connecting the first layer and the third layer to each other, wherein at least a portion of the first displacement limiting part is directly opposed to the mass body part, and at least a portion of the second displacement limiting part is directly opposed to the support part.

Abstract translation: 微机电系统（MEMS）传感器包括：第一层，其上形成有第一位移限制部分和第二位移限制部分; 第三层，其上形成有质量体部分和支撑部分; 以及将第一层和第三层彼此连接的第二层，其中第一位移限制部的至少一部分与质量体部直接相对，并且第二位移限制部的至少一部分直接相对 到支撑部分。