公开(公告)号：US09747542B2

公开(公告)日：2017-08-29

申请号：US15356448

申请日：2016-11-18

Applicant: NEOLOGY, INC.

Inventor： Paul Elizondo ,  John Azevedo

IPC: G06K19/077 ,  H04J3/06 ,  G06K7/00 ,  G06K19/07 ,  G06Q10/08 ,  G06K7/10 ,  H05K1/02 ,  H05K1/14 ,  H05K3/30

CPC classification number: G06K7/10475 ,  G06K7/0008 ,  G06K7/10029 ,  G06K7/10039 ,  G06K19/0723 ,  G06K19/07796 ,  G06K19/07798 ,  G06Q10/08 ,  H04J3/0641 ,  H05K1/02 ,  H05K1/0266 ,  H05K1/0268 ,  H05K1/142 ,  H05K3/30 ,  H05K2201/0909 ,  H05K2201/09127

Abstract: A breakaway RFID tag is configured such that it comprises part of a Printed Circuit Board Assembly (PCB). Thus, the breakaway RFID tag can be used to track the PCB as it migrates through a manufacturing process. In one embodiment, the RFID tag can be assembled first and then used to track the PCB as it is populated with components and installed into larger assemblies and ultimately into the end device. Once the PCB is installed into a larger assembly or the end device, the breakaway RFID tag is configured such that it can be broken off and attached to the outside of the larger assembly or end device.

公开(公告)号：US20170235982A1

公开(公告)日：2017-08-17

申请号：US15483908

申请日：2017-04-10

Applicant: NEOLOGY, INC.

Inventor： James Robert Kruest ,  Gary Bann

IPC: G06K7/10

CPC classification number: G06K7/10475 ,  G06K7/0008 ,  G06K7/10029 ,  G06K7/10039 ,  G06K19/0723 ,  G06K19/07796 ,  G06K19/07798 ,  G06Q10/08 ,  H04J3/0641 ,  H05K1/02 ,  H05K1/0266 ,  H05K1/0268 ,  H05K1/142 ,  H05K3/30 ,  H05K2201/0909 ,  H05K2201/09127

Abstract: RFID tags are used for many purpose including tracking. RFID interrogators are used to retrieve information from tags. In many applications, a plurality of RFID interrogators are required. Synchronization between interrogators in the same theatre of operation is critical to ensure that their broadcasts do not interfere with each other. In fixed RFID interrogator applications, RFID interrogators can be wired together allowing a channel to synchronize the transmissions of the RFID interrogators. Methods described herein can ensure that synchronization is maintained in the event of the failure of a synchronizing master. Furthermore, additional methods for synchronizing RFID interrogators in wireless applications are described allowing synchronization in the absence of wired connections between interrogators.

公开(公告)号：US09674958B2

公开(公告)日：2017-06-06

申请号：US14596770

申请日：2015-01-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-hun Jeon ,  Ho-jin Chun ,  Hyun-seok Cha ,  Jae-hoon Heo ,  Young-deok Kim

IPC: H05K1/00 ,  H05K1/18 ,  H05K7/00 ,  G11C5/06 ,  H01L23/00 ,  H01L25/18 ,  H05K1/02 ,  H05K3/46 ,  H01L23/538

CPC classification number: H05K1/181 ,  G11C5/063 ,  H01L23/538 ,  H01L24/16 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H05K1/0268 ,  H05K1/0286 ,  H05K3/4694 ,  H05K2201/09127 ,  H05K2201/09972

Abstract: A printed circuit board includes an in-line PCB region comprising an input/output control region including a first conductive line, and a main PCB region coupled to the in-line PCB region and comprising a semiconductor chip and an input/output signal generation region including a second conductive line. The input/output signal generation region is configured to detect whether or not the first and second conductive lines are electrically connected and to provide an input/output control signal to the semiconductor chip in response to determining whether or not the first and second conductive lines are electrically connected.

公开(公告)号：US20170142829A1

公开(公告)日：2017-05-18

申请号：US14995139

申请日：2016-01-13

Applicant: Multek Technologies Limited

Inventor： Pui Yin Yu ,  Mark Zhang ,  Jiawen Chen

IPC: H05K1/02 ,  H05K3/18 ,  H05K3/46 ,  H05K3/06 ,  H05K1/11 ,  H05K1/14

CPC classification number: H05K3/4691 ,  H05K2201/09127 ,  H05K2201/09781 ,  H05K2203/0228 ,  Y10T29/49126

Abstract: A printed circuit board (PCB) has multiple layers, where select portions of one or more conductive layers, referred to as core circuitry, form a semi-flexible PCB portion that is protected by an exposed prepreg layer. The semi-flexible PCB portion having an exposed prepreg layer is formed using a dummy core process that leaves the exposed prepreg layer smooth and undamaged. The core circuitry is part of a core structure. The semi-flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The core structure is common to both the semi-flexible PCB portion and the remaining rigid PCB portion.

公开(公告)号：US09646852B2

公开(公告)日：2017-05-09

申请号：US14963263

申请日：2015-12-09

Applicant: Unimicron Technology Corp.

Inventor： Cheng-Jui Chang ,  Ming-Hao Wu

IPC: H05K1/00 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L21/4857 ,  H01L23/13 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15333 ,  H01L2924/37001 ,  H05K1/183 ,  H05K3/4697 ,  H05K2201/09127 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A process for a substrate having a component-disposing area is provided, and includes the following steps. A core layer including a first surface, a metallic layer and a component-disposing area is provided. The metallic layer is disposed on the first surface and patterned to form a patterned metallic layer including pads located in the component-disposing area. A first dielectric layer is formed on the first surface and covers the patterned metallic layer. A laser-resistant metallic pattern is formed on the first dielectric layer and surrounds a projection area of the first dielectric layer. A release film is disposed on the projection area and covers a portion of the laser-resistant metallic pattern within the projection area. A second dielectric layer is formed on the first dielectric layer and covers the release film and the laser-resistant metallic pattern. A first open hole and a plurality of second open holes are formed.

公开(公告)号：US20160315134A1

公开(公告)日：2016-10-27

申请号：US15098444

申请日：2016-04-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NISHIDO ,  Tatsuya SAKUISHI

IPC: H01L27/32 ,  H01L51/56 ,  H05K3/00 ,  H01L51/00

CPC classification number: H01L27/3276 ,  H01L51/0097 ,  H01L51/56 ,  H01L2227/323 ,  H01L2251/5338 ,  H05K1/11 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/0052 ,  H05K3/288 ,  H05K3/361 ,  H05K2201/09127 ,  H05K2203/0228 ,  Y02E10/549 ,  Y02P70/521

Abstract: A circuit board in which damage to an electrode is reduced or a light-emitting device in which damage to an electrode is reduced is manufactured. A method for manufacturing the circuit board or the light-emitting device includes the following steps: preparing a processing member including a circuit and a terminal electrode over a first substrate, a separation layer over the terminal electrode, a bonding layer over the separation layer, and a second substrate over the bonding layer; forming a groove in the processing member using a blade capable of cutting processing by being rotated; and removing part of the separation layer, part of the bonding layer, and part of the second substrate to expose part of the terminal electrode.

Abstract translation: 制造电极损伤减少的电路板或电极损伤减少的发光装置。 制造电路板或发光装置的方法包括以下步骤：在第一基板上形成包括电路和端子电极的处理部件，在端子电极上方的分离层，分离层上的接合层， 和在所述接合层上的第二衬底; 使用能够旋转切削加工的刀片在所述加工构件中形成槽; 以及去除所述分离层的一部分，所述结合层的一部分和所述第二基板的一部分以暴露所述端子电极的一部分。

公开(公告)号：US20160219699A1

公开(公告)日：2016-07-28

申请号：US15091629

申请日：2016-04-06

Applicant: Yu-Ru Chang ,  Yu-Fang Hsia ,  Ling-Chih Chou

Inventor： Yu-Ru Chang ,  Yu-Fang Hsia ,  Ling-Chih Chou

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H05K3/22 ,  H05K1/18 ,  H05K3/10

CPC classification number: H05K1/0298 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/60 ,  H01L2924/0002 ,  H05K1/0286 ,  H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K3/22 ,  H05K3/4694 ,  H05K2201/09127 ,  H05K2201/09972 ,  H05K2203/0228 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A multi-layer substrate structure to achieve multiple arrangements of power/ground domains is disclosed. The multi-layer substrate structure comprises a first layer for disposing an integrated circuit thereon and a second layer coupled to the first layer, wherein a connection structure is electrically connected to a plurality of power/ground domains on the second layer. With different combinations of the sawing lines and keep-out regions on the multi-layer substrate structure for cutting off some portions of the connection structure, the invention can achieve multiple arrangements of power/ground domains without impacting the customer's PCB or system board design so as to cut short the cycle time for engineering development phase.

Abstract translation: 公开了实现电力/接地域的多种布置的多层基板结构。 多层衬底结构包括用于在其上设置集成电路的第一层和耦合到第一层的第二层，其中连接结构电连接到第二层上的多个电源/接地域。 通过在多层基板结构上的锯切线和保留区域的不同组合来切断连接结构的一些部分，本发明可以实现电力/接地域的多种布置，而不会影响客户的PCB或系统板设计 缩短工程开发阶段的周期时间。

公开(公告)号：US20160162776A1

公开(公告)日：2016-06-09

申请号：US15007079

申请日：2016-01-26

Applicant: NEOLOGY, INC.

Inventor： James Robert Kruest ,  Gary Bann

IPC: G06K19/077 ,  G06K7/10 ,  G06K19/07

CPC classification number: G06K7/10475 ,  G06K7/0008 ,  G06K7/10029 ,  G06K7/10039 ,  G06K19/0723 ,  G06K19/07796 ,  G06K19/07798 ,  G06Q10/08 ,  H04J3/0641 ,  H05K1/02 ,  H05K1/0266 ,  H05K1/0268 ,  H05K1/142 ,  H05K3/30 ,  H05K2201/0909 ,  H05K2201/09127

Abstract: RFID tags are used for many purpose including tracking. RFID interrogators are used to retrieve information from tags. In many applications, a plurality of RFID interrogators are required. Synchronization between interrogators in the same theatre of operation is critical to ensure that their broadcasts do not interfere with each other. In fixed RFID interrogator applications, RFID interrogators can be wired together allowing a channel to synchronize the transmissions of the RFID interrogators. Methods described herein can ensure that synchronization is maintained in the event of the failure of a synchronizing master. Furthermore, additional methods for synchronizing RFID interrogators in wireless applications are described allowing synchronization in the absence of wired connections between interrogators.

公开(公告)号：US20160069520A1

公开(公告)日：2016-03-10

申请号：US14940025

申请日：2015-11-12

Applicant: LedEngin, Inc.

Inventor： Xiantao Yan

IPC: F21K99/00 ,  F21V5/04 ,  H05K1/18 ,  H05K1/02 ,  H05K1/03 ,  F21V5/00 ,  F21V23/00

CPC classification number: F21V19/003 ,  F21K9/90 ,  F21V5/007 ,  F21V5/04 ,  F21V9/30 ,  F21V21/14 ,  F21V23/005 ,  F21V29/70 ,  F21Y2101/00 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/08 ,  H01L33/48 ,  H01L33/58 ,  H01L33/647 ,  H01L2924/0002 ,  H05K1/0204 ,  H05K1/0278 ,  H05K1/0283 ,  H05K1/0306 ,  H05K1/144 ,  H05K1/189 ,  H05K3/0061 ,  H05K3/0097 ,  H05K3/4626 ,  H05K3/4688 ,  H05K2201/042 ,  H05K2201/0909 ,  H05K2201/09127 ,  H05K2201/09263 ,  H05K2201/10106 ,  H05K2201/10121 ,  H05K2203/0143 ,  H05K2203/171 ,  H01L2924/00

Abstract: A flexible sheet of light-emitting diode (LED) light emitters includes a support substrate having a thermally conductive material. The flexible sheet of LED light emitters also has an LED emitter sheet overlying the support substrate, and the LED emitter sheet including a plurality of LED light emitters. The flexible sheet of LED light emitters also has a flexible circuit sheet overlying the LED emitter sheet, and a phosphor sheet overlying the flexible circuit sheet. The phosphor sheet includes a wave-length converting material. The flexible sheet of LED light emitters also has a lens sheet overlying the phosphor sheet. The lens sheet includes a plurality of lenses.

公开(公告)号：US09258908B2

公开(公告)日：2016-02-09

申请号：US13740286

申请日：2013-01-14

Applicant: Unimicron Technology Corp.

Inventor： Cheng-Jui Chang ,  Ming-Hao Wu

IPC: H05K1/16 ,  H05K3/46 ,  H01L23/13 ,  H01L23/00 ,  H01L23/498 ,  H05K1/18 ,  H01L21/48

CPC classification number: H01L21/4857 ,  H01L23/13 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/85 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15333 ,  H01L2924/37001 ,  H05K1/183 ,  H05K3/4697 ,  H05K2201/09127 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A substrate structure having a component-disposing area and a process thereof are provided. The substrate structure having a component-disposing area includes a core layer, a first dielectric-layer, a laser-resistant metallic-pattern and a second dielectric-layer. The core layer includes a first surface, a component-disposing area and a patterned metallic-layer disposed on the first surface and including multiple pads, and the pads are located within the component-disposing area. The first dielectric-layer is disposed on the core layer and includes multiple openings to respectively expose the pads. The laser-resistant metallic-pattern is disposed on the first dielectric-layer and surrounds a projection area of the first dielectric-layer which the component-disposing area is orthogonally projected on. The second dielectric-layer is disposed on the first dielectric-layer and covers the laser-resistant metallic-pattern, the second dielectric-layer includes a component-disposing cavity corresponding to the projection area, penetrating through the second dielectric-layer and communicated with the openings to expose the pads.

Abstract translation: 提供了具有部件配置区域的基板结构及其工艺。 具有部件配置区域的基板结构包括芯层，第一介电层，耐激光金属图案和第二介电层。 芯层包括第一表面，部件布置区域和设置在第一表面上并且包括多个焊盘的图案化金属层，并且焊盘位于部件布置区域内。 第一介电层设置在芯层上并且包括多个开口以分别暴露焊盘。 激光抵抗金属图案设置在第一电介质层上并且包围第一电介质层的投影区域，其中元件布置区域正交地投影在其上。 第二电介质层设置在第一电介质层上并覆盖耐激光金属图案，第二介电层包括与投影区域对应的部件设置腔，穿透第二介电层并与 露出垫的开口。