-
公开(公告)号:US11317521B2
公开(公告)日:2022-04-26
申请号:US16946712
申请日:2020-07-01
Applicant: Multek Technologies Limited
Inventor: Pui Yin Yu , Hong Tu Zhang , Xin Hua Zeng
Abstract: A printed circuit board includes a first and second core. The first core has a first conductive layer, a first non-conductive layer, a first copper layer and a first opening. The first core also has a first solder mask connected to the first copper layer and a first FR4 laminate bonded to the first solder mask. The second core has a second conductive layer, a second non-conductive layer, a second copper layer and a second opening. The second core also has a second solder mask connected to the second copper layer and a second FR4 laminate bonded to the second solder mask. A prepreg layer is between the first copper layer and the second copper layer but not between the first FR4 laminate and the second FR4 laminate.
-
公开(公告)号:US20170339788A1
公开(公告)日:2017-11-23
申请号:US15176063
申请日:2016-06-07
Applicant: Multek Technologies Limited
Inventor: Znewa Zeng , Pui Yin Yu
CPC classification number: H05K1/115 , H05K3/429 , H05K2201/0959 , H05K2201/09645 , H05K2203/0242
Abstract: A printed circuit board has multiple stacked layers laminated together. A through hole is formed through the laminated stack, and plating is applied to the side walls of the though hole, thereby forming a plated through hole. Second through holes are then formed through the laminated stack, where each second through hole overlaps an edge of the plated through hole. By aligning the second through holes at the edge of the plated through hole, the plating of the plated through hole coincident with each second through hole is removed, thereby separating the plated through hole into two separate circuit paths. Forming second through holes in this manner effectively splits the circuit path of the plated through hole into multiple separate circuit paths, which increases the circuit density of the printed circuit board.
-
公开(公告)号:US20170271734A1
公开(公告)日:2017-09-21
申请号:US15087793
申请日:2016-03-31
Applicant: Multek Technologies Limited
Inventor: Pui Yin Yu , Jiawen Chen
CPC classification number: H01P3/08 , H01P3/087 , H05K1/0298 , H05K1/115 , H05K3/06 , H05K3/422 , H05K3/4652 , H05K3/4697 , H05K2201/09036
Abstract: A PCB having multiple stacked layers laminated together. The laminated stack includes regular flow prepreg and includes an embedded cavity, the perimeter of which is formed by a photo definable, or photo imageable, polymer structure, such as a solder mask dam. The solder mask dam defines cavity dimensions and prevents prepreg resin flow into the cavity during lamination.
-
公开(公告)号:US20200015365A1
公开(公告)日:2020-01-09
申请号:US16552723
申请日:2019-08-27
Applicant: Multek Technologies Limited
Inventor: JL Zhou , Pui Yin Yu
IPC: H05K3/46
Abstract: A printed circuit board (PCB) has multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are covered by a coverlay material and the covered inner core circuitry is exposed from the remaining layers of the PCB. The PCB having covered inner core circuitry is formed using a dummy core plus coverlay process. The select inner core circuitry is part of an inner core. The inner core corresponding to the covered inner core circuitry forms a flexible PCB portion. The flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The inner core is common to both the flexible PCB portion and the remaining rigid PCB portion.
-
公开(公告)号:US20170318685A1
公开(公告)日:2017-11-02
申请号:US15159665
申请日:2016-05-19
Applicant: Multek Technologies Limited
Inventor: Jiawen Chen , Pui Yin Yu
CPC classification number: H05K3/429 , H05K1/115 , H05K2203/0207 , H05K2203/308
Abstract: A disconnect cavity is formed within a PCB, where the disconnect cavity is electrically disconnected from a PCB landing layer. The disconnect cavity is formed using a plating resist process which does not require low flow prepreg nor selective copper etching. Plating resist is printed on a core structure selectively positioned within a PCB stack-up. The volume occupied by the plating resist forms a subsequently formed disconnect cavity. After lamination of the PCB stack-up, depth control milling, drilling and electroless copper plating are performed, followed by a plating resist stripping process to substantially remove the plating resist and all electroless copper plated to the plating resist, thereby forming the disconnect cavity. In a subsequent copper plating process, without electric connectivity copper cannot be plated to the side walls and bottom surface of the disconnect cavity, resulting in the disconnect cavity wall being electrically disconnected from the PCB landing layer.
-
公开(公告)号:US20170142829A1
公开(公告)日:2017-05-18
申请号:US14995139
申请日:2016-01-13
Applicant: Multek Technologies Limited
Inventor: Pui Yin Yu , Mark Zhang , Jiawen Chen
CPC classification number: H05K3/4691 , H05K2201/09127 , H05K2201/09781 , H05K2203/0228 , Y10T29/49126
Abstract: A printed circuit board (PCB) has multiple layers, where select portions of one or more conductive layers, referred to as core circuitry, form a semi-flexible PCB portion that is protected by an exposed prepreg layer. The semi-flexible PCB portion having an exposed prepreg layer is formed using a dummy core process that leaves the exposed prepreg layer smooth and undamaged. The core circuitry is part of a core structure. The semi-flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The core structure is common to both the semi-flexible PCB portion and the remaining rigid PCB portion.
-
公开(公告)号:US10772220B2
公开(公告)日:2020-09-08
申请号:US16552723
申请日:2019-08-27
Applicant: Multek Technologies Limited
Inventor: J L Zhou , Pui Yin Yu
Abstract: A printed circuit board (PCB) has multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are covered by a coverlay material and the covered inner core circuitry is exposed from the remaining layers of the PCB. The PCB having covered inner core circuitry is formed using a dummy core plus coverlay process. The select inner core circuitry is part of an inner core. The inner core corresponding to the covered inner core circuitry forms a flexible PCB portion. The flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The inner core is common to both the flexible PCB portion and the remaining rigid PCB portion.
-
公开(公告)号:US09999134B2
公开(公告)日:2018-06-12
申请号:US15081623
申请日:2016-03-25
Applicant: Multek Technologies Limited
Inventor: Mark Zhang , Kwan Pen , Pui Yin Yu
CPC classification number: H05K3/048 , H05K1/036 , H05K1/183 , H05K3/0035 , H05K3/0044 , H05K3/4697 , H05K2201/0187 , H05K2201/09109 , H05K2201/0989 , H05K2203/0228 , H05K2203/1383
Abstract: A PCB having multiple stacked layers laminated together. The laminated stack includes regular flow prepreg and includes a recessed cavity, a bottom perimeter of which is formed by a photo definable, or photo imageable, polymer structure, such as a solder mask frame, and a protective film. The solder mask frame and protective film protect inner core circuitry at the bottom of the cavity during the fabrication process, as well as enable the use of regular flow prepreg in the laminated stack.
-
公开(公告)号:US20170265298A1
公开(公告)日:2017-09-14
申请号:US15081623
申请日:2016-03-25
Applicant: Multek Technologies Limited
Inventor: Mark Zhang , Kwan Pen , Pui Yin Yu
CPC classification number: H05K3/048 , H05K1/036 , H05K1/183 , H05K3/0035 , H05K3/0044 , H05K3/4697 , H05K2201/0187 , H05K2201/09109 , H05K2201/0989 , H05K2203/0228 , H05K2203/1383
Abstract: A PCB having multiple stacked layers laminated together. The laminated stack includes regular flow prepreg and includes a recessed cavity, a bottom perimeter of which is formed by a photo definable, or photo imageable, polymer structure, such as a solder mask frame, and a protective film. The solder mask frame and protective film protect inner core circuitry at the bottom of the cavity during the fabrication process, as well as enable the use of regular flow prepreg in the laminated stack.
-
公开(公告)号:US20170142828A1
公开(公告)日:2017-05-18
申请号:US14995087
申请日:2016-01-13
Applicant: Multek Technologies Limited
Inventor: Pui Yin Yu , Mark Zhang , Jiawen Chen
CPC classification number: H05K1/0278 , H05K1/0298 , H05K1/115 , H05K3/067 , H05K3/181 , H05K3/4611 , H05K3/4691 , H05K2203/0228 , H05K2203/0574 , H05K2203/06 , H05K2203/308
Abstract: A printed circuit board (PCB) has multiple layers, where select portions of inner layer circuitry, referred to as inner core circuitry, are exposed from the remaining layers. The PCB having an exposed inner core circuitry is formed using a dummy core plus plating resist process. The select inner core circuitry is part of an inner core. The inner core corresponding to the exposed inner core circuitry forms a semi-flexible PCB portion. The semi-flexible PCB portion is an extension of the remaining adjacent multiple layer PCB. The remaining portion of the multiple layer PCB is rigid. The inner core is common to both the semi-flexible PCB portion and the remaining rigid PCB portion.
-
-
-
-
-
-
-
-
-