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公开(公告)号：US07068518B2
公开(公告)日：2006-06-27
申请号：US09805250
申请日：2001-03-14
Applicant: Osamu Ueno , Hitoshi Arakaki
Inventor： Osamu Ueno , Hitoshi Arakaki
CPC classification number: H05K1/0231 , H01L2224/16225 , H01L2924/19105 , H05K1/0227 , H05K1/0234 , H05K1/112 , H05K2201/093 , H05K2201/09309 , H05K2201/09336 , H05K2201/09663 , H05K2201/10022 , H05K2201/10522 , H05K2201/10636 , Y02P70/611
Abstract: A circuit board device suppress with a small number of terminal elements unwanted irradiation originating between a power supply layer and a ground layer, even when a configuration of the power supply layer and the ground layer on the circuit board is complex, and a design support device thereof. The circuit board device has a power supply layer and a ground layer disposed in opposition to one another. A dielectric is disposed between the power supply layer and the ground layer. A power supply surface is divided into two power supply surfaces and by a slit having a generally T-shaped configuration to form power supply surface edges. The power supply surface edges retain across a predetermined length L a characteristic impedance present between the power supply layer and the ground layer. A terminal load is connected to a terminal portion of the power supply surface edges.
Abstract translation: 电路板装置即使在电源层和电路板上的接地层的配置复杂的情况下也抑制少量端子元件产生电源层和接地层之间的不需要的照射，并且设计支持装置 其中。 电路板装置具有彼此相对设置的电源层和接地层。 电介质设置在电源层和接地层之间。 电源表面被分成两个电源表面和通常具有大致T形构造的狭缝以形成电源表面边缘。 电源表面边缘在预定长度L之间保持存在于电源层和接地层之间的特征阻抗。 端子负载连接到电源表面边缘的端子部分。
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公开(公告)号：US06937480B2
公开(公告)日：2005-08-30
申请号：US10142203
申请日：2002-05-10
Applicant: Daisuke Iguchi , Joji Wakita , Kazumi Ikeda , Osamu Ueno
Inventor： Daisuke Iguchi , Joji Wakita , Kazumi Ikeda , Osamu Ueno
CPC classification number: H05K1/0216 , H05K1/0298 , H05K9/0039 , H05K2201/09245 , H05K2201/09254 , H05K2201/09336 , H05K2201/09345 , H05K2201/09618 , H05K2201/10689
Abstract: A printed wiring board is provided which can be applied even to circuit boards operating at high speed, and which can suppress electromagnetic wave radiation, and which can suppress a deterioration in density of mounting. At the printed wiring board, a first signal wire layer, a first ground layer having a first power source wire, a second ground layer having a second power source wire, and a second signal wire layer, are laminated. The first ground layer and the second ground layer are interlayer connected by many via holes. Return current, of signal current flowing through a signal wire, flows in the first ground layer, and a path of the return current is cut midway therealong at a position of the first power source wire. However, the return current is detoured by the via hole to the second ground layer, and flows thereat.
Abstract translation: 提供了一种印刷电路板，其可以甚至应用于高速操作的电路板，并且可以抑制电磁波辐射，并且可以抑制安装密度的劣化。 在印刷电路板上层叠有第一信号线层，具有第一电源线的第一接地层，具有第二电源线的第二接地层和第二信号线层。 第一接地层和第二接地层通过许多通孔进行层间连接。 流过信号线的信号电流的返回电流在第一接地层中流动，并且在第一电源线的位置处，中途返回电流的路径被切断。 然而，返回电流被通孔旋转到第二接地层，并在那里流动。
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103.发明授权公开(公告)号：US06909052B1
公开(公告)日：2005-06-21
申请号：US10226845
申请日：2002-08-23
Applicant: Darrin J. Haug , Brandon Barney
Inventor： Darrin J. Haug , Brandon Barney
CPC classification number: H05K1/025 , H05K1/0224 , H05K1/0245 , H05K1/0253 , H05K1/0298 , H05K2201/093 , H05K2201/09336 , H05K2201/0969 , H05K2201/09781
Abstract: A circuit board has a first signal layer having a set of conductors, a second signal layer having a conductive plane and a non-conductive region, and a third signal layer having a conductive region that mirrors the non-conductive region of the second signal layer. The circuit board further includes a first separating layer having non-conductive material which is disposed between the first signal layer and the second signal layer, and a second separating layer having non-conductive material which is disposed between the second signal layer and the third signal layer. Accordingly, traces within the first signal layer and overlying the conductive plane of the second signal layer will have a first impedance, while traces within the first signal layer and overlying the non-conductive region of the second signal layer and the conductive region of the third signal layer will have a second impedance that is different than the first impedance.
Abstract translation: 电路板具有具有一组导体的第一信号层，具有导电平面和非导电区域的第二信号层，以及具有与第二信号层的非导电区域反射的导电区域的第三信号层 。 电路板还包括具有设置在第一信号层和第二信号层之间的非导电材料的第一分离层，以及设置在第二信号层和第三信号之间的具有非导电材料的第二分离层 层。 因此，第一信号层内的并且覆盖第二信号层的导电平面的迹线将具有第一阻抗，而第一信号层内的迹线并且覆盖第二信号层的非导电区域和第三信号层的导电区域 信号层将具有不同于第一阻抗的第二阻抗。
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104.发明授权Printed circuit board routing and power delivery for high frequency integrated circuits 有权用于高频集成电路的印刷电路板布线和电源输送公开(公告)号：US06900992B2
公开(公告)日：2005-05-31
申请号：US09955230
申请日：2001-09-18
Applicant: Christopher J. Kelly , Jeffrey L. Krieger , Raymond P. Askew
Inventor： Christopher J. Kelly , Jeffrey L. Krieger , Raymond P. Askew
CPC classification number: H05K1/0233 , H05K1/0237 , H05K1/0243 , H05K3/4644 , H05K2201/086 , H05K2201/09336 , H05K2201/09345 , H05K2201/10689
Abstract: A printed circuit board includes a signal layer and a supply voltage plane layer. The signal layer includes traces to communicate signals that are not associated with regulated supply voltages. The supply voltage plane is embedded in the signal layer to supply power to multiple supply voltage pins of a component that is mounted to the printed circuit board. The printed circuit board may also include a supply voltage plane layer to communicate a supply voltage. A ground plane may be embedded in the supply voltage plane layer to provide ground connections to multiple pins of the component.
Abstract translation: 印刷电路板包括信号层和电源电压平面层。 信号层包括用于传送与调节电源电压无关的信号的迹线。 电源电压平面嵌入在信号层中，为安装到印刷电路板的部件的多个电源电压引脚供电。 印刷电路板还可以包括用于传送电源电压的电源电压平面层。 接地平面可以嵌入在电源电压平面层中，以提供与组件的多个引脚的接地连接。
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公开(公告)号：US20050018495A1
公开(公告)日：2005-01-27
申请号：US10769469
申请日：2004-01-29
Applicant: Jayesh Bhakta , Robert Pauley , William Gervasi
Inventor： Jayesh Bhakta , Robert Pauley , William Gervasi
CPC classification number: H05K1/023 , G11C5/04 , H05K1/0231 , H05K1/0233 , H05K1/0237 , H05K1/0246 , H05K1/0298 , H05K1/181 , H05K1/185 , H05K2201/09263 , H05K2201/09336 , H05K2201/09409 , H05K2201/10022 , H05K2201/1003 , H05K2201/10689 , H05K2201/10734 , Y02P70/611
Abstract: Abstract of the Disclosure Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of one-Gigabyte, two-Gigabyte, and four-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in the first row on a first lateral portion of the printed circuit board and in the second row on the first lateral portion are connected to a first addressing register with two register integrated circuits. The integrated circuits in the first row on the second lateral portion and in the second row on the second lateral portion are connected to a second addressing register with two register integrated circuits. Each addressing register processes a non-contiguous subset of the bits in each data word.
Abstract translation: 公开的摘要使用标准商业封装的集成电路被布置在印刷电路板上，以允许生产一千兆字节，两千兆字节和四千兆字节容量的存储器模块。 第一排集成电路定向成与第二排集成电路相反的方向。 印刷电路板的第一侧部分上的第一行中的集成电路和第一横向部分上的第二行中的集成电路连接到具有两个寄存器集成电路的第一寻址寄存器。 第二横向部分和第二横向部分的第二行中的第一行中的集成电路与具有两个寄存器集成电路的第二寻址寄存器连接。 每个寻址寄存器处理每个数据字中位的不连续子集。
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Patent Agency Ranking
公开(公告)号：US20030149942A1
公开(公告)日：2003-08-07
申请号：US10063737
申请日：2002-05-09
Inventor： Jimmy Hsu
IPC: G06F017/50
CPC classification number: H01L23/49838 , H01L23/552 , H01L2924/15173 , H05K1/0218 , H05K1/0298 , H05K2201/09336
Abstract: A multi-layered substrate having a voltage reference signal circuit layout therein. A major change in the design of the multi-layered substrate is the moving of a voltage reference signal trace from a signal layer to a non-signaling layer. Once the voltage reference signal trace is moved, the signal traces within the signal layer can have a larger layout area. Similarly, the voltage reference signal trace within the non-signaling layer can have greater layout flexibility in addition to electromagnetic shielding from other signal traces. Moreover, the voltage reference signal trace having a greater width may be used to reduce parasitic resistance within the voltage reference signal circuit.
Abstract translation: 一种其中具有电压参考信号电路布局的多层基板。 多层衬底的设计的主要变化是将电压参考信号迹线从信号层移动到非信号层。 一旦电压参考信号迹线移动，信号层内的信号迹线可能具有较大的布局面积。 类似地，除了来自其他信号迹线的电磁屏蔽之外，非信令层内的电压参考信号迹线可以具有更大的布局灵活性。 此外，具有较大宽度的电压参考信号迹线可用于减小电压参考信号电路内的寄生电阻。
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公开(公告)号：US20020176236A1
公开(公告)日：2002-11-28
申请号：US10142203
申请日：2002-05-10
Applicant: FUJI XEROX CO., LTD.
Inventor： Daisuke Iguchi , Joji Wakita , Kazumi Ikeda , Osamu Ueno
IPC: H05K005/00 , H05K005/04 , H05K005/06
CPC classification number: H05K1/0216 , H05K1/0298 , H05K9/0039 , H05K2201/09245 , H05K2201/09254 , H05K2201/09336 , H05K2201/09345 , H05K2201/09618 , H05K2201/10689
Abstract: A printed wiring board is provided which can be applied even to circuit boards operating at high speed, and which can suppress electromagnetic wave radiation, and which can suppress a deterioration in density of mounting. At the printed wiring board, a first signal wire layer, a first ground layer having a first power source wire, a second ground layer having a second power source wire, and a second signal wire layer, are laminated. The first ground layer and the second ground layer are interlayer-connected by many via holes. Return current, of signal current flowing through a signal wire, flows in the first ground layer, and a path of the return current is cut midway therealong at a position of the first power source wire. However, the return current is detoured by the via hole to the second ground layer, and flows thereat.
Abstract translation: 提供了一种印刷电路板，其可以甚至应用于高速操作的电路板，并且可以抑制电磁波辐射，并且可以抑制安装密度的劣化。 在印刷电路板上层叠有第一信号线层，具有第一电源线的第一接地层，具有第二电源线的第二接地层和第二信号线层。 第一接地层和第二接地层通过许多通孔进行层间连接。 流过信号线的信号电流的返回电流在第一接地层中流动，并且在第一电源线的位置处，中途返回电流的路径被切断。 然而，返回电流被通孔旋转到第二接地层，并在那里流动。
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108.发明申请Multilayer wiring substrate having differential signal wires and a general signal wire in different planes 有权具有差分信号线的多层布线基板和不同平面中的一般信号线公开(公告)号：US20020060366A1
公开(公告)日：2002-05-23
申请号：US09817787
申请日：2001-03-27
Inventor： Atsushi Kikuchi , Makoto Iijima , Yoshihiko Ikemoto , Muneharu Morioka , Yoshiyuki Kimura
IPC: H01L023/48
CPC classification number: H05K1/0245 , H01L23/13 , H01L23/49822 , H01L24/48 , H01L2224/05599 , H01L2224/16225 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/85399 , H01L2924/00014 , H01L2924/09701 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H05K1/0253 , H05K2201/09336 , H05K2201/09345 , H01L2224/45015 , H01L2924/207 , H01L2924/00012 , H01L2924/00
Abstract: A multilayer wiring substrate comprises differential signal wires placed within a first insulating layer between a first power-supply plane and a first ground plane; and general signal wires placed within a second insulating layer between a second power-supply plane and a second ground plane. In the multilayer wiring substrate, the differential signal wires are placed in a different plane from a plane having each of the general signal wires so that the different plane includes a first area having the differential signal wires, and a second area having one of the second power-supply plane and the second ground plane. The general signal wires are placed in a vertical direction of the second area in a laminated state so that each of the general signal wires is placed between the second power-supply plane and the second ground plane.
Abstract translation: 多层布线基板包括布置在第一电源平面和第一接地平面之间的第一绝缘层内的差分信号线; 以及放置在第二电源平面和第二接地平面之间的第二绝缘层内的一般信号线。 在多层布线基板中，差分信号线被放置在与具有每个通用信号线的平面不同的平面中，使得不同的平面包括具有差分信号线的第一区域，以及具有第二 电源平面和第二个接地层。 通常的信号线以叠层状态放置在第二区域的垂直方向上，使得每条通用信号线都位于第二电源平面和第二接地面之间。
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公开(公告)号：US06356166B1
公开(公告)日：2002-03-12
申请号：US09384114
申请日：1999-08-26
Applicant: Gary S. Goldsmith , Donn Harvey , Sheldon K. Meredith , Thomas Shafer
Inventor： Gary S. Goldsmith , Donn Harvey , Sheldon K. Meredith , Thomas Shafer
IPC: H01P118
CPC classification number: H05K1/0251 , H01P1/185 , H05K3/429 , H05K2201/0715 , H05K2201/09336 , H05K2201/09718
Abstract: The present invention provides systems and methods for phase shifting signals wherein the phase shifting circuitry may be disposed in a relatively small footprint. The preferred embodiment utilizes PIN diodes to provide switched line phase shifting, wherein the switched lines are microstrip and/or stripline transmission lines of predetermined lengths. To minimize the space required, the switched lines of the preferred embodiment are disposed on different layers of a multi-layered support structure, such as a multi-layer circuit board. Layer changing vias are preferably adapted to provide a constant impedance to thereby make changes in layers in the transmission path electrically transparent to a transmitted signal.
Abstract translation: 本发明提供了用于相移信号的系统和方法，其中相移电路可以设置在相对较小的占地面积内。 优选实施例利用PIN二极管来提供开关线相移，其中开关线是预定长度的微带线和/或带状线传输线。 为了最小化所需的空间，优选实施例的开关线路设置在诸如多层电路板的多层支撑结构的不同层上。 层切换通孔优选地适于提供恒定的阻抗，从而使传输路径中的层的变化对于传输的信号电透明。
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公开(公告)号：US20010035799A1
公开(公告)日：2001-11-01
申请号：US09805250
申请日：2001-03-14
Inventor： Osamu Ueno , Hitoshi Arakaki
IPC: H01P003/08
CPC classification number: H05K1/0231 , H01L2224/16225 , H01L2924/19105 , H05K1/0227 , H05K1/0234 , H05K1/112 , H05K2201/093 , H05K2201/09309 , H05K2201/09336 , H05K2201/09663 , H05K2201/10022 , H05K2201/10522 , H05K2201/10636 , Y02P70/611
Abstract: A circuit board device suppress with a small number of terminal elements unwanted irradiation originating between a power supply layer and a ground layer, even when a configuration of the power supply layer and the ground layer on the circuit board is complex, and a design support device thereof. The circuit board device has a power supply layer and a ground layer disposed in opposition to one another. A dielectric is disposed between the power supply layer and the ground layer. A power supply surface is divided into two power supply surfaces and by a slit having a generally T-shaped configuration to form power supply surface edges. The power supply surface edges retain across a predetermined length L a characteristic impedance present between the power supply layer and the ground layer. A terminal load is connected to a terminal portion of the power supply surface edges.
Abstract translation: 电路板装置即使在电源层和电路板上的接地层的配置复杂的情况下也抑制少量端子元件产生电源层和接地层之间的不需要的照射，并且设计支持装置 其中。 电路板装置具有彼此相对设置的电源层和接地层。 电介质设置在电源层和接地层之间。 电源表面被分成两个电源表面和通常具有大致T形构造的狭缝以形成电源表面边缘。 电源表面边缘在预定长度L之间保持存在于电源层和接地层之间的特征阻抗。 端子负载连接到电源表面边缘的端子部分。
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